DESIGN-RULE文件认知什么是DESIGN-RULE什么是什么是DesignDesignrulerule？Designrule 顾名思义就是设计规则是为了保证集成电路生产的成功和高产品率，要求版图设计符合一定的规则，包括导线交叉条件、最小线宽、多晶硅在场区上的最小伸出长度等等这些规则有些是必须共同遵守的，违反了就不能得到合格的IC;有些是是可按各家工厂的经验自行规定，以保证得到高的成品率为了保证这些设计规范得到遵守，可用专用的设计规则检查程序对设计完毕的版图数据进行检查Designrule一般是foundry厂商提供，根据产品的制程给出相应的rule文件DESIGN-RULE为什么为什么layout engineer必须要了解必须要了解design-rule?画版图时需要按design rule的要求来操作，design rule是制造厂商根据工艺，工厂设备，制作流程和水平等相关指标，设定出一个相符的规则，以保证生产出的chip是有效的design rule与layout有很大的关系，有很多重复的劳动都是源自于design rule的upgrade（提升）也就是在circuit不变的情况下，如果design rule有变化，layout也要跟着变化（这里无形之中就增加了不少的工作量。
所谓design rule有变化是指，同一家工厂的制程变化，在不同的工厂生产等情况下，所造成的design rule的变化，但无论是何种原因引起的，layout总是要动手改的所以，作为一个layout engineer是有必要对design rule有足够的了解的，并知道存在design rule的用意在何处DESIGN-RULEu Width u Spaceu Overlapu Enclosure u Extensionu AreaGeometrical Layout TerminologyDESIGN-RULEWidth Distance of interior-facing edge for single layer(W)Distance of interior-facing edge for single layer(W)WRule No.DescriptionRuleNW.W.1Width=0.62umCO.W.1Width(square)(maximum=minimum)=0.12umDESIGN-RULE如果层次的width有误，我们在验证的时候，报错结果会用INT来表述 INT（Internal）检查以个图形的宽度单层INT:检查单层图形的宽度双层INT：检查一层图形伸入到另一层图形的距离Width Distance of interior-facing edge for single layer(W)Distance of interior-facing edge for single layer(W)DESIGN-RULE单层单层INTINT命令：宽度检查命令：宽度检查DESIGN-RULE双层双层INT:INT:伸入长度检查伸入长度检查DESIGN-RULE Space Distance of exterior-facing edge for one or two layers(S)Distance of exterior-facing edge for one or two layers(S)Rule No.DescriptionRuleNW.S.1space=0.62umNW.S.6space to N+ACTIVE=0.22umAAAA(c)(b)AAB(d)(a)DESIGN-RULE Space Distance of exterior-facing edge for one or two layers(S)Distance of exterior-facing edge for one or two layers(S)如果层次之间的space有误，我们在验证的时候，报错结果会用EXT来表述 EXT（External）检查两个图形的间距单层EXT:检查单层图形的间距双层EXT：检查两层图形的间距DESIGN-RULE单层单层EXTEXT检查检查DESIGN-RULE双层双层EXTEXT检查检查DESIGN-RULE Overlap Distance of interior-facing edge for two layers(O)Distance of interior-facing edge for two layers(O)Rule No.DescriptionRulePP.O.1 overlap of OD=0.13umBA(a)BA(b)DESIGN-RULE Enclosure Distance of inside edge to outside edge Distance of inside edge to outside edge(Fully inside)(EN)(Fully inside)(EN)Rule No.DescriptionRuleNW.EN.2Enclosure of P+ACTIVE=0.22umBADESIGN-RULE如果层次之间的覆盖有错，我们在验证的时候，报错结果会用ENC来表述 ENC（Enclosure）检查一个图形与另一个图形的覆盖Enclosure Distance of inside edge to outside edge(Fully Distance of inside edge to outside edge(Fully inside)(EN)inside)(EN)DESIGN-RULE双层双层ENCENC检查检查DESIGN-RULE双层双层ENCENC检查检查DESIGN-RULE Extension Distance of inside edge to outside edge(EX)Distance of inside edge to outside edge(EX)Rule No.DescriptionRulePO.EX.1 extension on OD(end cap)=0.16umBADESIGN-RULE AreaRule No.DescriptionRuleNW.A.1Area=1.55umxumDESIGN-RULEClearanceRule No.DescriptionRuleOD.C.1Minimum clearance from NW edge to a N+OD region which is inside the NW=0.15umAB(a)AB(b)DESIGN-RULE一些常见的一些常见的ruleruleDESIGN-RULE文件常常见见的的rulerule文文件件DESIGN-RULE常见的常见的rulerule文件文件DESIGN-RULE常见的常见的rulerule文件文件DESIGN-RULE常见的常见的rulerule文件文件DESIGN-RULE常见的常见的rulerule文件文件DESIGN-RULE常见的常见的rulerule文件文件DESIGN-RULE常见的常见的rulerule文件文件DESIGN-RULE常见的常见的rulerule文件文件DESIGN-RULE常见的常见的rulerule文件文件DESIGN-RULE练习根据以上的学习，找出HICMOS 0.5UM 3.3V LOGIC DESIGN RULE中的简rule。
