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1、1. 中断号定义typedef enum IRQn/* Cortex-M4 Processor Exceptions Numbers */ NonMaskableInt_IRQn = -14, /*! 2 Non Maskable Interrupt */ MemoryManagement_IRQn = -12, /*! 4 Cortex-M4 Memory Management Interrupt */ BusFault_IRQn = -11, /*! 5 Cortex-M4 Bus Fault Interrupt */ UsageFault_IRQn = -10, /*! 6 Cortex
2、-M4 Usage Fault Interrupt */ SVCall_IRQn = -5, /*! 11 Cortex-M4 SV Call Interrupt */ DebugMonitor_IRQn = -4, /*! 12 Cortex-M4 Debug Monitor Interrupt */ PendSV_IRQn = -2, /*! 14 Cortex-M4 Pend SV Interrupt */ SysTick_IRQn = -1, /*! 15 Cortex-M4 System Tick Interrupt */* STM32 specific Interrupt Numb
3、ers */ WWDG_IRQn = 0, /*! Window WatchDog Interrupt */ PVD_IRQn = 1, /*! PVD through EXTI Line detection Interrupt */ TAMP_STAMP_IRQn = 2, /*! Tamper and TimeStamp interrupts through the EXTI line */ RTC_WKUP_IRQn = 3, /*! RTC Wakeup interrupt through the EXTI line */ FLASH_IRQn = 4, /*! FLASH globa
4、l Interrupt */ RCC_IRQn = 5, /*! RCC global Interrupt */ EXTI0_IRQn = 6, /*! EXTI Line0 Interrupt */ EXTI1_IRQn = 7, /*! EXTI Line1 Interrupt */ EXTI2_IRQn = 8, /*! EXTI Line2 Interrupt */ EXTI3_IRQn = 9, /*! EXTI Line3 Interrupt */ EXTI4_IRQn = 10, /*! EXTI Line4 Interrupt */ DMA1_Stream0_IRQn = 11
5、, /*! DMA1 Stream 0 global Interrupt */ DMA1_Stream1_IRQn = 12, /*! DMA1 Stream 1 global Interrupt */ DMA1_Stream2_IRQn = 13, /*! DMA1 Stream 2 global Interrupt */ DMA1_Stream3_IRQn = 14, /*! DMA1 Stream 3 global Interrupt */ DMA1_Stream4_IRQn = 15, /*! DMA1 Stream 4 global Interrupt */ DMA1_Stream5
6、_IRQn = 16, /*! DMA1 Stream 5 global Interrupt */ DMA1_Stream6_IRQn = 17, /*! DMA1 Stream 6 global Interrupt */ ADC_IRQn = 18, /*! ADC1, ADC2 and ADC3 global Interrupts */ CAN1_TX_IRQn = 19, /*! CAN1 TX Interrupt */ CAN1_RX0_IRQn = 20, /*! CAN1 RX0 Interrupt */ CAN1_RX1_IRQn = 21, /*! CAN1 RX1 Inter
7、rupt */ CAN1_SCE_IRQn = 22, /*! CAN1 SCE Interrupt */ EXTI9_5_IRQn = 23, /*! External Line9:5 Interrupts */ TIM1_BRK_TIM9_IRQn = 24, /*! TIM1 Break interrupt and TIM9 global interrupt */ TIM1_UP_TIM10_IRQn = 25, /*! TIM1 Update Interrupt and TIM10 global interrupt */ TIM1_TRG_COM_TIM11_IRQn = 26, /*
8、! TIM1 Trigger and Commutation Interrupt and TIM11 global interrupt */ TIM1_CC_IRQn = 27, /*! TIM1 Capture Compare Interrupt */ TIM2_IRQn = 28, /*! TIM2 global Interrupt */ TIM3_IRQn = 29, /*! TIM3 global Interrupt */ TIM4_IRQn = 30, /*! TIM4 global Interrupt */ I2C1_EV_IRQn = 31, /*! I2C1 Event Interrupt */ I2C1_ER_IRQn = 32, /*! I2C1 Error Interrupt */ I2C2_EV_IRQn
