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1、File system support on Multi Level Cell (MLC) flash in open source,April 17, 2008 Kyungmin Park Software Laboratories Samsung Electronics,2/23,Contents,Introduction Multi Level Chip (MLC) Current status Known Issues Patents Consideration in JFFS2 Summary References,3/23,Introduction,Its not cover Fl
2、ash properties Write/read disturb Hardware issues Controller embedded Its talking about the MLC software itself How to use MLC flash directly? Whats the consideration on MLC?,4/23,Multi Level Cell (MLC),Capable for low-cost consumer applications Media players, MP3 devices, media cards, and USB flash
3、 drives Gray code is dependent on each manufacturers,5/23,Multi Level Cell (MLC),I/O split vs. Page split Performance Endurance Wear-leveling,I/O Split method,Page Split method,6/23,Current status,Why theres no software using MLC directly in linux? JFFS2 doesnt support the MLC YAFFS MLC NAND handlin
4、g is under way UBIFS? LogFS? Another approaches Embedded MMC (eMMC) Controller embedded Samsung MoviNAND, Micron ManagedNAND Solid State Drive (SSD) Etc. Whats the issues?,7/23,Known Issues,Number Of Program (NOP) 1 Write the page only once Its simple and already done. Spare Area MLC uses the more p
5、owerful ECC/EDC mechanism It means it requires the more spare area Handle the paired page problem A lot of solutions but patents,8/23,NOP 1,JFFS2 uses the NOP 2 main area and OOB area for cleanmarker UBI uses MAX NOP 4 by the provided subpage_sft E.g., subpage_sft = 2 Sector write (4) Add the MTD_OO
6、B_WRITEABLE bit Clearing the MTD_OOB_WRITEABLE bit if the probed chip is MLC. Assign the subpage_sft to 0 Disable the subpage write,9/23,Spare Area,Spare usages are dependent on each filesystems In worse case it cant use the spare area,10/23,Paired Page Problem,The pages are coupled in MLC. When pro
7、gram operation is abnormally aborted (ex. power-down, reset), not only page data under program but also paired page data may be damaged even though it was written correctly at previous time Its dependent on each manufacturers. E.g., The 4 pages distance Each pages have the distance of 4,From http:/
8、(M-Systems),11/23,State Transitions,One direction Program: Level 0 Level 3 Erase: Level n Level 0,From http:/ (Intel),12/23,Patents,There are a lot of patents Similar with FTL situation Skip Write Skip the affected pages and write the safe page LSB backup Backup LSB page to log or others SLC-like wr
9、ite Regard some MLC pages as SLC by using LSB or MSB only Single level cell programming in a multiple level cell non-volatile memory device http:/ More and more,13/23,LSB backup,Backup or copy LSB page to safe place such as log,From http:/ (SanDisk),14/23,LSB backup,From http:/ (M-Systems),15/23,SLC
10、-like write,Regard some area as SLC,From http:/ (Micron),16/23,N-bit MLC,Its more complicate E.g., 3-bit MLC US2006/0215450, 2006, Toshiba,17/23,N-bit MLC,If the 3rd page is abnormally aborted, the 1st and 2nd will be damaged,18/23,Considerations in JFFS2,How to determine the page distances? Depende
11、nt on each manufacturers How to handle paired page? Patents, patents, patents, Node management in JFFS2 Use the nodes as many as possible If the paired page is broken Skip the broken page and continue to read remained pages How to guarantee the filesystem consistency? UBI layer Abstract the flash pr
12、operties Handle this layer?,19/23,Chip Support,Not hardware controller If the chip supports the paired page problem features? LSB recovery Use their own property techniques In scan process, if it detects the MSB is broken, it issues the LSB recovery command and copy recovered page not damaged one to
13、 others,20/23,Summary,Its not easy to determine the page distances Its not easy to implement it because of patents Chip support LSB recovery Wheres the best place to implement in it? Filesystem vs. UBI Another approaches Use the controlled embedded devices Embedded MMC (eMMC),21/23,References,Linux
14、Memory Technology Devices http:/www.linux-mtd.infradead.org/ http:/git.infradead.org/?p=mtd-2.6.git;a=summary YAFFS http:/ NAND, OneNAND http:/ http:/ 4 pages distance Patent number: 6988175 Flash memory management method that is resistant to data corruption by power http:/ Single level cell programming in a multiple level cell non-volatile memory device http:/ End,Thank You. Q&A,
