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1、when output is hold on 1 or 0,Static model of CMOS,R will be changed with VG,The electric model for basic CMOS circuit,When Vx is increased, Rp will be increased and Rn be decreased !,Figure 3-8 3-9 The output voltage is changed When input voltage changed.,The resistors are changed with input,Steady
2、-state behavior for inverter,Ideal behavior,Real behavior,The input between VIL and VIH : amplified area !,Logic level and noise margin,The input limit : to avoid the noise be amplified!,VOHmin,VOLmax,VIHmin,VILmax,If an input is not used ?,If an input keep floating, the output will be undecided, or
3、 the gate may be damaged ! Must connected it to some where !,Can we connect more than one output to a single line?,Never,Yes , but only one is not Z !,Yes , but need pull up resistor !,Schmitt Trigger input,Use feedback circuit to shift the switching threshold depending on the input changing ways.,Hysteresis: the difference between the threshold,Schmitt Trigger input,It can be used to eliminate noise !,
