江南大学计算机控制系统巴基斯坦老师课件

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1、Presented By: M Junaid Khan Associate Professor, Dept. of Electronic and Power Engineering 86-15251605382 National University of Science and Technology Pakistan1ContentsnBrief Review of last lecturenDirect Digital DesignnConditions to obtain Discrete Closed-loop Transfer FunctionnDead-Beat Controll

2、ernThe Simpler Case Stable poles/zeros, No time delay, Reference is step inputnThe General Case Stable/Unstable Plant, with delay, Reference could be any (step, ramp, acceleration)nDead-Beat Control with inter-sampling ripplenDead-Beat Control without inter-sampling ripplenDead-Beat Control with uns

3、table poles and zeros and delaynLimitations of the Deadbeat ControlnHomework2Brief Review- Discrete PID ControlThe transfer function of Discrete PID controller can be obtained using backward or Tustin Approximation or both One way to obtain the transfer function for Analog PID controller is by using

4、 Ziegler-Nichols Tuning RulesThe Ziegler-Nichols Table applies equally to obtain Discrete PID ControllerUsing Ziegler-Nichols Tuning Rules the digital controller parameters can be similarly estimated, except for the system delay- which is added with half of the sampling intervalCareful tuning of the

5、 controller can result in a better response for larger sampling time, as compared to Indirect Digital DesignThe response of the Discrete PID control obtained though Ziegler-Nichols Tuning Rules is oscillatory but has better disturbance rejection property 3Brief Review- Direct Digital DesignCompariso

6、n of Indirect Design Method and Direct Design Method Advantages DisadvantagesDirect Digital Design can be accomplished through Controller SynthesisController synthesis require certain conditions to be fulfilledOne way of Controller Synthesis is Finite Settling Time Method or DeadBeat Control MethodD

7、eadBeat Control Method relies on the fact that the system continuous poles in s-domain at negative infinity correspond to discrete poles in z-domain at the originDeadBeat Control Method can also be applied to unstable plants with deadtime (time delay)4Brief Review- Direct Digital DesignIn DeadBeat C

8、ontrol Method, determining a suitable closed-loop transfer function is the main obstacleIf the system to be controlled G(z) has poles and zeros inside the unit circle and has no dead-time, a pure delay can be chosen asChoosing such a closed loop transfer function (pure delay) can synthesize a contro

9、ller, which can achieve steady state in one sample but at the cost of: Inter-sample ripples High control gainInter-sample ripples and high control gain can be reduced, but at the expense of large settling time Presence of Inter-sample ripples can be checked, and Inter-sample ripples can be removed5D

10、irect design methodDead-beat control6q Simpler Case Plant has no unstable poles and zeros, no delay and reference is step input1. Control Design resulting in response with inter-sample ripples 2. Control Design resulting in response without inter-sample ripplesq General Case - Plant has unstable pol

11、es and zeros, has delay and reference is step, ramp or acceleration and response has no inter- sample ripplesDirect design methodDead-beat control7Direct design methodDead-beat controlWe are interested to find expression for or to compute DR(z)D(z)1e-Ts sr(t)y(t)+ -G0(s)E(z)U(z )Y(z )G(z )(z)8q Simp

12、ler Case 1 Plant has no unstable poles and zeros, no delay and reference is step input 1. Control Design resulting in response with inter-sample ripplesDirect design methodDead-beat controlDesign Principle Beside ensuring other conditions for Direct Digital Control Design, chooseThe conditions requi

13、red for the choice of are as follows: q must have the same pole-zero deficit as G(z) for Causality q must contain as zeros all the zeros of G(z) that are outside the unit circle for Stability qThe zeros of must include all the poles of G(z) that are outside the unit circle for Stability q For Steady

14、 State Accuracy Zero Steady State Error9q Simpler Case 2 Plant has no unstable poles and zeros, no delay and reference is step input 2. Control Design resulting in response without inter-sample ripplesDirect design methodDead-beat controlDesign Principle Beside ensuring other conditions for Direct D

15、igital Control Design, chooseK can be computed from the steady state condition10Direct design methodDead-beat control Simpler Case 1Example1:- Let the continuous plant is described by: and T=0.02 sec Here we have no poles or zeros outside the unit circle, so a deadbeat Controller can be designed by

16、setting:11Direct design methodDead-beat control Simpler Case 1Knowing G(z) and the dead-beat controller is: The resulting sampled and analog closed loop response is shown in Fig 1, whereas the corresponding control variable is shown in Fig 2. 12Direct design methodDead-beat controlFig 1 Step response for the deadbeat control, T=0.0213Direct des

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