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1、Computer Architecture, Spring 2008清华大学 计算机系科学与技术系 http:/CPU单周期处理器设计单周期处理器设计（A single-cycle MIPS processor）汪东升汪东升(Prof. Dongsheng Wang)1 1Computer Architecture, Spring 20082A single-cycle MIPS processor?As previously discussed, an instruction set architecture is an interface that defines the hardware
2、 operations that are available to software.?Any instruction set can be implemented in many different ways.?In a basic single-cycle implementation all operations take the same amount of timea single cycle.?In a pipelined implementation, a processor can overlap the execution of several instructions, p
3、otentially leading to big performance gains.Computer Architecture, Spring 20083Single-cycle implementation?In lecture, we will describe the implementation a simple MIPS-based instruction set supporting just the following operations.?We use MIPS because it is significantly easier to implement than x8
4、6.?Today well build a single-cycle implementation of this instruction set.?All instructions will execute in the same amount of time; this will determine the clock cycle time for our performance equations.?Well explain the datapath first, and then make the control unit.Arithmetic:addsubandorsltData T
5、ransfer:lwswControl:beqComputer Architecture, Spring 20084Computers are state machines?A computer is just a big fancy state machine.?Registers, memory, hard disks and other storage form the state.?The processor keeps reading and updating the state, according to the instructions in some program.?Theo
6、ry classes explicitly model computers as state machines or finite automata.StateCPUComputer Architecture, Spring 20085John von Neumann?In the old days, “programming” involved actually changing a machines physical configuration by flipping switches or connecting wires.?A computer could run just one p
7、rogram at a time.?Memory only stored data that was being operated on. ?Then around 1944, John von Neumann and others got the idea to encode instructions in a format that could be stored in memory just like data.?The processor interprets and executes instructions from memory.?One machine could perfor
8、m many different tasks, just by loading different programs into memory. ?The “stored program” design is often called a Von Neumann machine. Computer Architecture, Spring 20086Memories?Its easier to use a Harvard architecture at first, with programs and data stored in separate memories.?To fetch inst
9、ructions and read & & write words, we need these memories to be 32-bits wide (buses are represented by dark lines here), so these are 230x 32 memories. (We will ignore byte addressability for the moment.)?Blue lines represent control signals. MemRead and MemWrite should be set to 1 if the data memor
10、y is to be read or written respectively, and 0 otherwise.?When a control signal does something when it is set to 1, we call it active high (vs. active low) because 1 is usually a higher voltage than 0.?For today, we will assume you cannot write to the instruction memory.?Pretend its already loaded w
11、ith a program, which doesnt change while its running.Read addressInstruction memoryInstruction 31-0Read addressWrite addressWrite dataData memoryRead dataMemWriteMemReadComputer Architecture, Spring 20087Instruction fetching?The CPU is always in an infinite loop, fetching instructions from memory an
12、d executing them.?The program counter or PC register holds the address of the current instruction.?MIPS instructions are each four bytes long, so the PC should be incremented by four to read the next instruction in sequence.Read addressInstruction memoryInstruction 31-0P CAdd4Computer Architecture,
13、Spring 20088Encoding R-type instructions?A few weeks ago, we saw encodings of MIPS instructions as 32-bit values.?Register-to-register arithmetic instructions use the R-type format.op is the instruction opcode, and func specifies a particular arithmetic operation (see the back of the textbook).rs, r
14、t and rd are source and destination registers.?An example instruction and its encoding:add $s4, $t1, $t2oprsrtrdshamtfunc6 bits5 bits5 bits5 bits5 bits6 bits000000010010101010100000001000000Computer Architecture, Spring 20089Registers and ALUs?R-type instructions must access registers and an ALU.?Ou
15、r register file stores thirty-two 32-bit values.?Each register specifier is 5 bits long.?You can read from two registers at a time.RegWrite is 1 if a register should be written.?Heres a simple ALU with five operations, selected by a 3- bit control signal ALUOp.Read register 1Read register 2Write reg
16、isterWrite dataRead data 2Read data 1RegistersRegWriteALUOpFunction000and 001or 010add 110subtract 111sltALUALUOpComputer Architecture, Spring 200810Executing an R-type instruction1.Read an instruction from the instruction memory. 2.The source registers, specified by instruction fields rs and rt, should be read from the register file. 3.The ALU performs the desired operation. 4.Its result is stored in the destinatio
