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1、Mid-term ReviewTongwei RenSoftware Institute, Nanjing UniversityApr. 29, 2014Lecture 12C0864 Computer Organization and Architecture2NANJING UNIVERSITYConcept Computer General-purpose electronic digital computer Architecture (visible to programmer) The attributes have a direct impact on the logical e
2、xecution of a program Instruction set, the number of bits to represent data type, E.g.: Is there a multiply instruction? Organization (transparent to programmer) The operational units and their interconnections Control signals, memory technology, E.g.: Implement multiply by a hardware unit or repeat
3、ed addition?3NANJING UNIVERSITYThe von Neumann machine Idea: main memory storing programs and data Prototype of all subsequent computers Central Arithmetical (CA) Central Control (CC) Memory (M) Input (I) / Output (O)4NANJING UNIVERSITYComputer Performance Performance evaluation CPU: speed Memory: c
4、apacity, speed I/O: speed, capacity The main goal / driver is the increase of CPU speed System clock Instruction execution Million Instructions Per Second (MIPS) Million Floating Point Operations Per Second (MFLOPS)5NANJING UNIVERSITYComputer Components6NANJING UNIVERSITYCPU: Interrupt A mechanism b
5、y which other modules (e.g. I/O) may interrupt normal sequence of processing Multiple interrupts7NANJING UNIVERSITYMemory: Cache Principle Average access time Design elements Cache size Mapping function Replacement algorithm Write policy Line size Number of caches8checkhit missNANJING UNIVERSITYMemo
6、ry: Main Memory Memory cell Semiconductor memory types Memory array9addressdatacontrolHow to refresh?How to select?NANJING UNIVERSITYMemory: External Memory Magnetic disk Data organization, formatting, read and write mechanism, physical characteristics, timing of a disk transfer Timing of a disk tra
7、nsfer Optical memory Magnetic tape Parallel vs. serial 10NANJING UNIVERSITYMemory: Virtual Memory Partitioning vs. paging Virtual memory Size of page Mapping function Write policy TLB11TLB Cache MainMemoryVA PA misshitPage tablevalidmissinvalidvalidCPUHard diskpage faultVAPAPAinvalidNANJING UNIVERSI
8、TYMemory: Error Basic idea Add some bits to store additional information for correction Process Type Parity checking Hamming code Cyclic redundancy check12NANJING UNIVERSITYMemory: RAID Redundant Array of Independent Disks Basic idea Characteristic13NANJING UNIVERSITYI/O External device I/O module:
9、function, evolution, structure I/O operation technique Programmed I/O Interrupt driven I/O Direct memory access External interface: serial vs. parallel 14NANJING UNIVERSITYBus A communication pathway connecting two or more devices Key characteristic Component Design elements Bus type Arbitration: daisy chain, query by a counter, independently request, self selection, collision detection Timing: synchronous, asynchronous, semi-synchronous, split bus transaction Bus bandwidth and data transfer rate Bus hierarchy1516Thank You