《{SMT表面组装技术}SMT04WaferPrepCD》由会员分享，可在线阅读，更多相关《{SMT表面组装技术}SMT04WaferPrepCD（44页珍藏版）》请在金锄头文库上搜索。
1、,Semiconductor Manufacturing TechnologyMichael Quirk & Julian Serda October 2001 by Prentice HallChapter 4Silicon and Wafer Preparation,Objectives,After studying the material in this chapter, you will be able to: 1.Describe how raw silicon is refined into semiconductor grade silicon. 2.Explain the c
2、rystal structure and growth method for producing monocrystal silicon. 3.Discuss the major defects in silicon crystal. 4.Outline and describe the basic process steps for wafer preparation, starting from a silicon ingot and finishing with a wafer. 5.State and discuss seven quality measures for wafer s
3、uppliers. 6.Explain what is epitaxy and why it is important for wafers.,Semiconductor-Grade Silicon,Table 4.1,Crystal Structure,Amorphous Materials Unit Cells Polycrystal and Monocrystal Structures Crystal Orientation,Siemens Reactor for SG Silicon,Figure 4.1,Atomic Order of a Crystal Structure,Figu
4、re 4.2,Amorphous Atomic Structure,Figure 4.3,Unit Cell in 3-D Structure,Unit cell,Figure 4.4,Faced-centered Cubic (FCC) Unit Cell,Figure 4.5,Silicon Unit Cell: FCC Diamond Structure,Figure 4.6,Polycrystalline and Monocrystalline Structures,Figure 4.7,Axes of Orientation for Unit Cells,Figure 4.8,Mil
5、ler Indices of Crystal Planes,Figure 4.9,Monocrystal Silicon Growth,CZ Method CZ Crystal Puller Doping Impurity Control Float-Zone Method Reasons for Larger Ingot Diameters,CZ Crystal Puller,Figure 4.10,Silicon Ingot Grown by CZ Method,Photograph courtesy of Kayex Corp., 300 mm Si ingot,Photo 4.1,CZ
6、 Crystal Puller,Photograph courtesy of Kayex Corp., 300 mm Si crystal puller,Photo 4.2,Dopant Concentration Nomenclature,Table 4.2,Float Zone Crystal Growth,Figure 4.11,Wafer Diameter Trends,Figure 4.12,Wafer Dimensions & Attributes,Table 4.3,Increase in Number of Chips on Larger Wafer Diameter,Figu
7、re 4.13,Developmental Specifications for 300-mm Wafer Dimensions and Orientation,Table 4.4,From H. Huff, R. Foodall, R. Nilson, and S. Griffiths, “Thermal Processing Issues for 300-mm Silicon Wafers: Challenges and Opportunities,” ULSI Science and Technology (New Jersey: The Electrochemical Society,
8、 1997), p. 139.,Crystal Defects in Silicon,A crystal defect (microdefect) is any interruption in the repetitive nature of the unit cell crystal structure. Three general types of crystal defects in silicon: 1.Point defects -Localized crystal defect at the atomic level 2.Dislocations -Displaced unit c
9、ells 3.Gross defects -Defects in crystal structure,Yield of a Wafer,Figure 4.14,Reduction in defect density is a critical aspect for increasing wafer yield.,Point Defects,Redrawn from Sorab K. Ghandi, VLSI Fabrication Principles: Silicon and Gallium Arsenide, 2nd edition, New York, Wiley, 1994, page
10、 23,Figure 4.15,Dislocations in Unit Cells,Figure 4.16,Crystal Slip(Gross Defects),Redrawn from Sorab K. Ghandi, VLSI Fabrication Principles: Silicon and Gallium Arsenide, 2nd edition, New York, Wiley, 1994, page 49,Figure 4.17,Crystal Twin Planes(Gross Defects),Redrawn from Sorab K. Ghandi, VLSI Fa
11、brication Principles: Silicon and Gallium Arsenide, 2nd edition, New York, Wiley, 1994, page 55,Figure 4.18,Basic Process Steps for Wafer Preparation,Figure 4.19,Ingot Diameter Grind,Figure 4.20,Wafer Identifying Flats,Figure 4.21,Wafer Notch and Laser Scribe,Figure 4.22,Internal diameter wafer saw,
12、Internal Diameter Saw,Figure 4.23,Polished Wafer Edge,Figure 4.24,Chemical Etch of Wafer Surface to Remove Damage,Figure 4.25,Double-Sided Wafer Polish,Figure 4.26,Quality Measures,Physical dimensions Flatness Microroughness Oxygen content Crystal defects Particles Bulk resistivity,Improving Silicon
13、 Wafer Requirements,Adapted from K. M. Kim, “Bigger and Better CZ Silicon Crystals,” Solid State Technology (November 1996), p. 71.,Improving Silicon Wafer Requirements,Notes: A. Flatness is the linear thickness variation across the wafer or a site on a wafer (see below). B.See below for a descripti
14、on of microroughness. C.RMS is a method for determining the best estimate of group of measurements in this case, the surface finish measurements (see below). It is calculated by taking the root-mean-square (square root of the average of all measurements squared). Surface finish measurements are obta
15、ined by measuring the highest point relative to the lowest point on a surface. D.ppm is part per million. E.Bulk microdefects represents all defects within a square centimeter. F.See below to define epilayer.,Wafer Deformation,Figure 4.27,Flatness of Wafer Front Surface,Figure 4.28,Silicon wafer surface,Formation of Epitaxial Silicon Layers,Figure 4.29,Chapter 4 Review,Summary 88 Key Terms88 Review Questions89 Selected Industry Web Sites90 References90,
