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1、中文2330字THE MICROPROCESSOR SYSTEMA microprocessor system can be described at a number of different levels of complexity. The least complex from is that of a simple block diagram describing the interconnection and flow of information functional blocks and will be used to examine the operation of a mic
2、roprocessor system. All microprocessor systems contain a central processing unit(CPU),program anddata memory and input(I/O) devices.Fig.4-4 show a block diagram of a typicalembedded microprocessor system in which each block corresponds roughly to the individual integrated circuit(chip) used in the s
3、ystem. The memory section contains both non-volatile read only memory(ROM) as program memory and volatile random access memory(RAM) as read/write data memory .For each type of memory there are a number of different types of devices ,such as erasable ROMs and static or dynamic RAMs, each of which is
4、chosen for an application based on its cost and function. Four different I/O functions are shown in Fig.4-4.An analogue input channel to the microprocessor system is provided by the analogue to digital(A/D) converter and may be used to connect a device such as an analogue to digital(A/D) converter a
5、nd may be used to connect a device such as an analogue sensor. An analogue output channel is provided by the digital to analogue(D/A) converter and could be used to control an output transducer such as an electric motor, The parallel I/O device provides a number of individual lines. In output mode t
6、hese can be programmed to provide logic levels 1 or 0 to activate binary(on/off)devices such as lamps. In input mode it allows the microprocessor to read the state of switches and other binary devices. The serial I/O device is used to provide communications with other microprocessor systems or with
7、an operator console used to configure the system for various operational modes.The level and power specifications of the interfacing signals of the microprocessor system are frequently incompatible with the signal specifications of the devices which are to be interfaced to it .For example, the outpu
8、t voltage of a D/A converter may typically be in the range 0-5 volts and be capable of supplying only a few milliamperes of current,Fig.4-4 Block diagram of a typical embedded microprocessor system while the electric motor may require a control voltage range of plus and minus 12 volts at a maximum c
9、urrent of 1 ampere. Consequently, additional analogue interface circuitry is often necessary to perform functions such as signal level shifting, amplification and filtering. Fig.4-4 also shows there peripheral circuits: an input control unit(ICU),a programmable counter/timer, and a direct memory acc
10、ess unit(DMA).All this devices are interfaced to the CPU by means of a system bus which is itself made up from an address bus and a control bus. Physically, a bus is simple a collection of parallel interconnections between to or more devices. The number of lines contained in each bus is dependent on
11、 the type of microprocessor used in the system and the function of the bus. In Fig.4-4 we assume that the address bus has sixteen lines, the data bus has eight lines ,and the control bus contains an arbitrary number of lines depending on the control functions provided by the CPU. The concepts of add
12、ress and data are fundamental to the operation of a stored program computer and form a feature of all microprocessors and computers. The memory will consist of a number of memory locations capable of storing data written to them by the CPU over the data bus .Each memory location is uniquely identifi
13、ed to the CPU by a number called its address. The CPU controls the address and control bus lines in order to write or read information to or form the memory or I/O devices. For example, if the CPU wished to write the binary number 01010101 into a memory location which had the address 000000000000111
14、1,the CPU would first place the address on to the address bus, then place the number 01010101 as data onto the data bus. Controls lines in the control bus would then be activated to cause the data to be loaded into the appropriate memory location. A similar procedure would be used if the CPU was the
15、n to read a memory address, except this the flow of data would be from the memory to the CPU. After the CPU had placed the address of the required memory location on to the address bus .it would indicate to the memory that it wished to read the value by activating the relevant line in the control bu
16、s .The memory would respond by placing the contents of the memory location ad data on to the data bus ,and this would then be read by the CPU. Within the system bus, the address bus is an output bus from the CPU and an input bus to the other devices. The control bus consists of a number of lines, each of which may be either a control output from the CPU or a control input to the CPU. The data bus however acts as both an input bus and an output bu
