外文翻译--开环PWM控制技术.doc

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1、附 录Open loop PWM control techniquesSinusoidal PWM (SPWM)SPWM technique is one of the most popular modulation techniques among the others applied in power switching inverters. In SPWM, a sinusoidal reference voltage waveform is compared with a triangular carrier waveform to generate gate signals for

2、the switches of inverter. Power dissipation is one of the most important issues in high power applications. The fundamental frequency SPWM control method was proposed to minimize the switching losses. The multi-carrier SPWM control methods also have been implemented to increase the performance of mu

3、ltilevel inverters and have been classified according to vertical or horizontal arrangements of carrier signal. The vertical carrier distribution techniques are defined as Phase Dissipation (PD), Phase Opposition Dissipation (POD), and Alternative Phase Opposition Dissipation (APOD), while horizonta

4、l arrangement is known as phase shifted (PS) control technique. In fact PS-PWM is only useful for cascaded H-bridges and flying capacitors, while PD-PWM is more useful for NPC。Each of the mentioned multi-carrier SPWM control techniques have been illustrated in Fig. :1, respectively. The sinusoidal S

5、PWM is the most widely used PWM control method due to many advantages including easy implementation, lower harmonic outputs according to other techniques, and low switching losses. In SPWM control, a high frequency triangular carrier signal is compared with a low frequency sinusoidal modulating sign

6、al in an analog or logic comparator devices. The frequency of modulating sinusoidal signal defines the desired line voltage frequency at the inverter output .Fig. 1. Multi-carrier SPWM control strategies:(a) PD, (b) POD, (c) APOD, (d) PS.Fig. 2. An SPWM controlled inverter : (a) complete system, (b)

7、 modulator block of invertermaSwitching freq. (Hz)Line voltages (V)Line currents (A)Switching angleTHD ratios (% THD) Line currentLine voltage10.61000202.816.19309.34107.2520.6200021216.19304.4692.7230.65000202.816.2730.41.7125.2140.610,000206.316.2829.890.885.3650.81000277.121.58308.3081.7260.82000

8、295.722.9429.865.4164.9170.85000293.823.0129.962.9733.6380.810,000303.924.0429.555.0117.28911000351.627.3130.148.2861.211012000355.727.6829.784.1651.78111500037729.2329.673.7832.6612110,000409.132.126.624.8214.23131.21000385.129.9830.057.9552.68141.22000387.730.2229.924.6048.42151.25000389.832.4722.

9、3410.5932.10161.210,000425.933.1526.47.5722.01171.41000399.831.1230.37.4349.37181.42000403.931.5829.934.1446.43191.45000424.432.4728.234.8327.75201.410,000441.333.3623.537.1315.31Table 1. Current and voltage THD analysis of full bridge inverter.A three-phase full bridge inverter and the SPWM modulat

10、or that has been designed to generate switching signals for three-phase full bridge inverter is depicted in Fig. 2a and Fig. 2b . In the designed three-level inverter, modulated SPWM signals have been used to control MOSFET switches of the inverter, and THD(Total Harmonic Distortion) analysis of out

11、put voltage and current have been performed as seen in Table 1.The design parameters were as follows; DC voltage (VDC)=300V Modulation index (mi)=0.6mi1.4Switching frequency (fsw)=1kHzfsw10kHzLoad resistance (RL)=5Load impedance (L)=5mHRated power=10kVAIn the harmonic analyses of SPWM controlled inv

12、erter designed using Simulink; the lowest THD for current has been measured as 0.88% while modulation index is 0.6 and switching frequency at 10kHz. The THD for line voltage has been measured as 5.36% for the same operating conditions The line voltage has increased almost proportional to Eq. (1) in

13、over-modulation range, while proportional to Eq. (2) in linear modulation range.In SPWM control technique, the output voltage is obtained in linear modulation range, (1) (2) Another application has been implemented using SPWM technique to control a five-level CHB-MLI as seen in Fig 3. The designed V

14、SI is based on the topology of Fig. 4 which includes dual H-bridge cells as shown in Fig. 5 per phase to generate a five-level output voltage. The main topological calculations which are performed initially indicate the requirements of modulator and inverter blocks, and allow obtaining a well prepar

15、ed modulation algorithm to increase the performance of inverter.Fig.3. An SPWM controlled five-level CHB-MLI controlled inverter:(a) complete system, (b) CHB-MLI block.Fig. 4. Three-phase five-level topology of cascaded H-bridge multilevel inverterFig. 5: three-level CHB-MLI.The proposed inverter includes six H-bridges and four SPWM s

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