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1、英 文 翻 译系 别专 业班 级学生姓名学 号指导教师 Design and Experiment of SINS/GPS Integrated Navigation System AbstractTo meet the requirements of SINS/GPS integrated navigation system such as high accuracy, low power consumption and small size, an embedded navigation computer system based on DSP and FPGA was designed.
2、 At first, the overall structure of the navigation computer system was demonstrated. The navigation computer hardware module was consists of two sub modules i.e., the navigation information processing sub module, and the data acquisition and communication sub module. Secondly,Kalman integrated filte
3、r scheme was designed and then system software work flow was introduced. Finally, the prototype verified experiment was made. The experimental results showed that the system can effectively accomplish the missions of navigation sensor data acquisition, real-time navigation solution, running of Kalma
4、n filter algorithm and peripheral equipment instruction fetch. The requirements of the navigation computer for SINS/GPS integrated navigation system can be totally met.Index Termsintegrated navigation, embedded computer,SINS, GPS, Kalman filterI. INTRODUCTION The SING/GPS integrated navigation syste
5、m 1, 2consists of strap down inertial navigation system (SINS)3 and global positioning system (GPS) 4. The navigation computer is an integrated navigation system serves two functions (a) to complete a large number of real-time data processing operations, e.g., inertial measurement unit (IMU) raw dat
6、a preprocessing, GPS receiver message preprocessing, inertial navigation solution and integrated filtering operation; (b) to complete the task of data communication with external navigation sensors and navigation application equipments,e.g., acquisition of raw data of gyroscope, accelerometer and ot
7、her inertial sensors and GPS receiver message,command reading of navigation application equipments and output of the navigation results5, 6. Traditional navigation computers are mostly based onPC104 architecture 7 and have some shortcomings as follows. They usually have larger volume, higher power c
8、onsumption and complex operating system. There are always difficulties in hardware maintaining. The operational performances of a traditional navigation computer are limited to the CPU dominant frequency andthe real-time performance is relatively lower. Thus, the traditional navigation computers are
9、 not suitable for the integrated navigation system 8. In this work, an embedded integrated navigation computer with digital signal processor (DSP) and field programmable gate array (FPGA) was designed as the core architecture of an integrated navigation computer in order to reach the performances of
10、 high real-time, low power consumption and small volume. The navigation computer, IMU and GPS compose the prototype platform of a SINS/GPS integrated navigation system. A Kalman filter 9, 10 for GPS speed and position measurement was designed according to the characteristics of the SINS/GPS integrat
11、ed navigation system. The navigation accuracy of integrated navigation system cannot be guaranteed during GPS outages. Hence, the intelligent switch between integrated navigation mode and pure inertial navigation mode was designed in the working mode of the system to effectively avoid the abovementi
12、oned disadvantage.II. DESIGN OF NAVIGATION COMPUTER HARDWARE Navigation computer needs to complete navigation sensor data acquisition, real-time navigation solution,navigation results output, etc. According to the functions,the navigation computer system designed in this work consists of two sub mod
13、ules for navigation informationprocessing and data acquisition and communication. The navigation information processing sub module, and the data acquisition and communication sub module. The navigation data processing module is mainly composed of DSP, SDRAM, FLASH, clock circuit, bus driving circuit
14、 and FPGA-implemented logic control circuit. The DSP mainly completes the various navigation algorithms; the SDRAM is mainly used to expand the memory space required for system operation; the FLASH is mainly used to expand the external ROM and solidify the system program code; the main function of t
15、he clock circuit is to provide a stable clock reference for the navigation computer system; the bus driving circuit and the logic control circuit mainly coordinate the DSP chip to complete reading-writing of external memory data andI/O port. Both strap down algorithm and integrated filtering algorit
16、hm, which have high computational complexity and high requirements on real-time performance, involve a large number of matrix operations and finite impulse response (FIR) filters. The DSP is a new digital signal processor which can achieve real-time, fast and effective numerical operations. And DSP has integrated internal integrated FIR filters 11. When selecti
