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1、英文原文DescriptionThe at89s52 is a low-power, high-performance CMOS 8-bit microcomputer with 4K bytes of Flash Programmable and Erasable Read Only Memory PEROM and128 bytes RAM. The device is manufactured using Atmel s high density nonvolatilememory technology and is compatible with the industry standa
2、rd MCS5-1. instruction set and pinout. The chip combines a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel at89s52 is a powerful microcomputer which provides a highly flexible and cost effective solution to many embedded control applications.Features:. Compatible with MCS-51. Products
3、. 4K Bytes of In-System Reprogrammable Flash Memory. Endurance: 1,000 Write/Erase Cycles. Fully Static Operation: 0 Hz to 24 MHz. Three-Level Program Memory Lock. 128 x 8-Bit Internal RAM. 32 Programmable I/O Lines. Two 16-Bit Timer/Counters. Six Interrupt Sources. Programmable Serial Channel. Low P
4、ower Idle and Power Down ModesThe at89s52 provides the following standard features: 4K bytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bit timer/counters, a five vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator and clock circuitry.In addition, the at89s52
5、 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system to continue functioning. The Power Down Mode saves the RAM contents but fr
6、eezes the oscillator disabling all other chip functions until the next hardware reset.Pin Description:VCCSupply voltage. GNDGround.Port 0Port 0 is an 8-bit open drain bidirectional I/O port. As an output port each pin can sink eight TTL inputs. When is are written to port 0 pins, the pins can be use
7、d as high impedance inputs.Port 0 may also be configured to be the multiplexed loworder address/data bus during accesses to external program and data memory. In this mode P0 has internal pullups.Port 0 also receives the code bytes during Flash programming, and outputs thecode bytes during program ve
8、rification. External pullups are required during program verification.Port 1Port 1 is an 8-bit bidirectional I/O port with internal pullups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled high by the internal pullups and can be used as i
9、nputs. As inputs, Port 1 pins that are externally being pulled low will source current IIL because of the internal pullups.Port 1 also receives the low-order address bytes during Flash programming and verification.Port 2Port 2 is an 8-bit bidirectional I/O port with internal pullups. The Port 2 outp
10、ut buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current IIL because of the internal pullups.Port 2 emits the high-order addre
11、ss byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses MOVX DPTR. In this application it uses strong internal pull-ups when emitting 1s. During accesses to external data memory that use 8-bit addresses MOVX RI, Port 2 emits the conte
12、nts of the P2 Special Function Register.Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.Port 3Port 3 is an 8-bit bidirectional I/O port with internal pullups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are wr
13、itten to Port 3 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current IIL because of the pullups.Port 3 also serves the functions of various special features of the at89s52 as listed below:Port pin
14、alternate functionsP3.0rxd serial input portP3.1txd serial output portP3.2int0 external interrupt0P3.3int1 external interrupt1P3.4t0 timer0 external inputP3.5t1 timer1 external inputP3.6WR external data memory write strobeP3.7rd external data memory read strobewhile the oscillator is running resets
15、the device.ALE/PROGPort 3 alsoreceives some control signals for Flash programming and verification.RSTReset input. A high on this pin for two machine cyclesAddress Latch Enable output pulse for latching the low byte of the addressduring accesses to external memory. This pin is also the program pulse input PROG during Flash programming.In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is sk
