数据手册ht1621b

上传人:小** 文档编号:93029760 上传时间:2019-07-15 格式:PDF 页数:21 大小:169.47KB
返回 下载 相关 举报
数据手册ht1621b_第1页
第1页 / 共21页
数据手册ht1621b_第2页
第2页 / 共21页
数据手册ht1621b_第3页
第3页 / 共21页
数据手册ht1621b_第4页
第4页 / 共21页
数据手册ht1621b_第5页
第5页 / 共21页
点击查看更多>>
资源描述

《数据手册ht1621b》由会员分享,可在线阅读,更多相关《数据手册ht1621b(21页珍藏版)》请在金锄头文库上搜索。

1、HT1621 RAM Mapping 32?4 LCD Controller for I/O MCU Selection Table HT162XHT1620HT1621HT1622HT16220HT1623HT1625HT1626 COM44888816 SEG32323232486448 Built-in Osc. ? Crystal Osc. ? Rev. 1.301August 6, 2003 Features ?Operating voltage: 2.4V5.2V ?Built-in 256kHz RC oscillator ?External 32.768kHz crystal

2、or 256kHz frequency source input ?Selection of 1/2 or 1/3 bias, and selection of 1/2 or 1/3 or 1/4 duty LCD applications ?Internal time base frequency sources ?Two selectable buzzer frequencies (2kHz/4kHz) ?Power down command reduces power consumption ?Built-in time base generator and WDT ?Time base

3、 or WDT overflow output ?8 kinds of time base/WDT clock sources ?32?4 LCD driver ?Built-in 32?4 bit display RAM ?3-wire serial interface ?Internal LCD driving frequency source ?Software configuration feature ?Data mode and command mode instructions ?R/W address auto increment ?Three data accessing m

4、odes ?VLCD pin for adjusting LCD operating voltage ?HT1621: 48-pin SSOP package HT1621B: 48-pin DIP/SSOP/LQFP package HT1621D: 28-pin SKDIP package HT1621G: Gold bumped chip General Description The HT1621 is a 128 pattern (32?4), memory mapping, and multi-function LCD driver. The S/W configuration f

5、eature of the HT1621 makes it suitable for multiple LCD applications including LCD modules and display sub- systems. Only three or four lines are required for the in- terface between the host controller and the HT1621. The HT1621 contains a power down command to re- duce power consumption. Block Dia

6、gram Note:CS: Chip selection BZ, BZ: Tone outputs WR, RD, DATA: Serial interface COM0COM3, SEG0SEG31: LCD outputs IRQ: Time base or WDT overflow output Pin Assignment HT1621 Rev. 1.302August 6, 2003 ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?

7、 ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ! ? ? ? ? ? ? “ ? ? ? # $ ? “ $ ? # % ? ? ? ? ? ? ? ? 3 ? - 4 ? ? . 4 ? $ ? ? ? ? ? ? ? ? ? ? ? ? 7 ? ? ? ? ? ? / - , 7 = ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? / - , 7 = ? ? ? ? ? ? ? ? ? 7 System

8、Oscillator Configuration HT1621 Rev. 1.308August 6, 2003 not only enables the time base generator but activates the WDT time-out flag output (connect the WDT time-out flag to the IRQ pin). After the TIMER EN com- mand is transferred, the WDT is disconnected from the IRQ pin, and the output of the ti

9、me base generator is con- nectedtotheIRQpin.TheWDTcanbeclearedbyexecut- ing the CLR WDT command, and the contents of the time base generator is cleared by executing the CLR WDT or the CLR TIMER command. The CLR WDT or the CLR TIMER command should be executed prior to the WDT EN or the TIMER EN comma

10、nd respectively. Before ex- ecuting the IRQ EN command the CLR WDT or CLR TIMER command should be executed first. The CLR TIMER command has to be executed before switching from the WDT mode to the time base mode. Once the WDT time-out occurs, the IRQ pin will stay at a logic low level until the CLR

11、WDT or the IRQ DIS command is is- sued. After the IRQ output is disabled the IRQ pin will re- main at the floating state. The IRQ output can be enabled or disabled by executing the IRQ EN or the IRQ DIS command, respectively. The IRQ EN makes the outputofthetimebasegeneratororoftheWDTtime-out flag a

12、ppear on the IRQ pin. The configuration of the time base generator along with the WDT are as shown. In the case of on-chip RC oscillator or crystal oscillator, the power down mode can reduce power consumption since the oscillator can be turned on or off by the corre- sponding system commands. At the

13、 power down mode the time base/WDT loses all its functions. On the other hand, if an external clock is selected as the source of system frequency the SYS DIS command turns out invalid and the power down mode fails to be carried out. That is, after the external clock source is se- lected, the HT1621

14、will continue working until system power fails or the external clock source is removed. Af- ter the system power on, the IRQ will be disabled. Tone Output A simple tone generator is implemented in the HT1621. The tone generator can output a pair of differential driv- ing signals on the BZ and BZ, wh

15、ich are used to gener- ate a single tone. By executing the TONE4K and TONE2K commands there are two tone frequency out- puts selectable. The TONE4K and TONE2K commands set the tone frequency to 4kHz and 2kHz, respectively. The tone output can be turned on or off by invoking the TONE ON or the TONE O

16、FF command. The tone out- puts, namely BZ and BZ, are a pair of differential driving outputsusedtodriveapiezobuzzer.Oncethesystemis disabled or the tone output is inhibited, the BZ and the BZ outputs will remain at low level. LCD Driver The HT1621 is a 128 (32?4) pattern LCD driver. It can be configured as 1/2 or 1/3 bias and 2 or 3 or 4 commons of LCD driver by the S/W configuration. This feature makes the HT1621 suitable for multiply LCD applica- tions. The LCD driving clo

展开阅读全文
相关资源
相关搜索

当前位置:首页 > 商业/管理/HR > 管理学资料

电脑版 |金锄头文库版权所有
经营许可证:蜀ICP备13022795号 | 川公网安备 51140202000112号