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1、Computer English,Chapter 2 Organization of Computers,计算机专业英语,2-2,Key points: useful terms and organization of computers Difficult points: describing the organization of computers,计算机专业英语,2-3,Requirements:,1. Terms of computer hardware,2. Organization of computers and their functions,3. 掌握专业词汇的构成规律，特
2、别是常用词缀及复合词的构成,计算机专业英语,2-4,New Words & Expressions: instruction cycle 指令周期 decode vt.解码, 译解 bus n. 总线 pins n.插脚, 管脚 uppermost adj.最高的；adv.在最上 address bus 地址总线 data bus 数据总线 via prep.经, 通过, 经由 multibit 多位 bidirectional 双向的 unidirectional 单向的 hierarchy n.层次，层级 microprocessor n.微处理器 register n.寄存器 timin
3、g n.定时；时序；时间选择 synchronize vt.使.同步 assert vt.主张，发出 deassert vt. 撤销 trigger vt.引发, 引起, 触发 map v.映射 port n.端口,2.1 Basic Organization of Computers,Abbreviations: CPU(Central Processing Unit) 中央处理器 I/O(Input/Output) 输入输出(设备),计算机专业英语,2-5,2.1 Basic Organization of Computers,Fig.2-1 Generic computer organi
4、zation,计算机专业英语,2-6,2.1 Basic Organization of Computers,Most computer systems, from the embedded controllers found in automobiles and consumer appliances to personal computers and mainframes, have the same basic organization. This organization has three main components: the CPU, the memory subsystem,
5、 and the I/O subsystem. The generic organization of these components is shown in Figure 2-1.,大多数计算机系统，从汽车和日用电器中的嵌入式控制器到个人计算机和大型主机，都具有相同的基本组成。其基本组成包括三个主要部件：CPU、存储器子系统和I/O子系统。这些部件的一般组成如图2-1所示。,计算机专业英语,2-7,Physically, a bus is a set of wires. The components of the computer are connected to the buses. T
6、o send information from one component to another, the source component outputs data onto the bus. The destination component then inputs this data from the bus. As the complexity of a computer system increases, it becomes more efficient (in terms of minimizing connections) at using buses rather than
7、direct connections between every pair of devices. Buses use less space on a circuit board and require less power than a large number of direct connections. They also require fewer pins on the chip or chips that comprise the CPU.,2.1.1 System Buses,从物理上来说，总线就是一组导线。计算机的部件就是连在总线上的。为了将信息从一个部件传到另一个部件，源部件
8、先将数据输出到总线上，然后目标部件再从总线上接受这些数据。随着计算机系统复杂性的不断增长，使用总线比每个设备对之间直接连接要有效得多（就减少连接数量而言）。与大量的直接连接相比，总线使用较少的电路板空间，耗能更少，并且在芯片或组成CPU的芯片组上需要较少的引脚。,计算机专业英语,2-8,The system shown in Figure 2-1 has three buses. The uppermost bus in this figure is the address bus. When the CPU reads data or instructions from or writes
9、data to memory, it must specify the address of the memory location it wishes to access. It outputs this address to the address bus; memory inputs this address from the address bus and use it to access the proper memory location. Each I/O devices, such as a keyboard, monitor, or disk drive, has a uni
10、que address as well. When accessing an I/O device, the CPU places the address of the device on the address bus. Each device can read the address off of the bus and determine whether it is the device being accessed by the CPU. Unlike the other buses, the address bus always receives data from the CPU;
11、 the CPU never reads the address bus.,图2-1所示的系统包括三组总线。最上面的是地址总线。当CPU从存储器读取数据或指令，或写数据到存储器时，它必须指明将要访问的存储器单元地址。CPU将地址输出到地址总线上，而存储器从地址总线上读取地址，并且用它来访问正确的存储单元。每个I/O设备，比如键盘、显示器或者磁盘，同样都有一个唯一的地址。当访问某个I/O设备时，CPU将此设备的地址放到地址总线上。每一个设备均从总线上读取地址并且判断自己是否就是CPU正要访问的设备。与其他总线不同，地址总线总是从CPU上接收信息，而CPU从不读取地址总线。,2.1.1 Syste
12、m Buses,计算机专业英语,2-9,Data is transferred via the data bus. When the CPU fetches data from memory, it first outputs the memory address on its address bus. Then memory outputs the data onto the data bus; the CPU can then read the data from the data bus. When writing data to memory, the CPU first output
13、s the address onto the address bus, then outputs the data onto the data bus. Memory then reads and stores the data at the proper location. The processes for reading data from and writing data to the I/O devices are similar.,数据是通过数据总线传送的。当CPU从存储器中取数据时，它首先把存储器地址输出到地址总线上，然后存储器将数据输出到数据总线上，这样CPU就可以从数据总线上
14、读取数据了。当CPU向存储器中写数据时，它首先将地址输出到地址总线上，然后把数据输出到数据总线上，这样存储器就可以从数据总线上读取数据并将它存储到正确的单元中。对I/O设备读写数据的过程与此类似。,2.1.1 System Buses,计算机专业英语,2-10,The control bus is different from the other two buses. The address bus consists of n lines, which combine to transmit one n-bit address value. Similarly, the lines of th
15、e data bus work together to transmit a single multibit value. In contrast, the control bus is a collection of individual control signals. These signals indicate whether data is to be read into or written out of the CPU, whether the CPU is accessing memory or an I/O device, and whether the I/O device
16、 or memory is ready to transfer data. Although this bus is shown as bidirectional in Figure 2-1, it is really a collection of (mostly) unidirectional signals. Most of these signals are output from the CPU to the memory and I/O subsystems, although a few are output by these subsystems to the CPU. We examine these signals in more detail when we look at the instruction cycle and the subsystem interface.,控制总线与以上两种总线都不相同。地址总线由n根线构成，n根线联合传送一个n位的地址值。类似地，数据总线的各条线合起来传输一个单独的多位值。相反，控制总线是单根控制信号的集
