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1、12/8/201812/8/2018 P.1,AHDL Training Class,Danny Mok Altera HK FAE (),12/8/201812/8/2018 P.2,What is AHDL,Altera Hardware Description Language develop by Altera integrate into the Altera software Max+Plus II description the hardware in language instead of graphic easy to modify easy to maintane very
2、 good for complex combinational logic BCD to 7 Segment converter address decoding state machine more than you want,12/8/201812/8/2018 P.3,continue.,As easy as Graphic Entry As powerful as HDL (Hardware Description Language) VHDL, Verilog HDL etc.,12/8/201812/8/2018 P.4,How to use the ADHL,use any te
3、xt editor to create the file Altera Software Max+Plus II provide text editor,Type in your AHDL design file,12/8/201812/8/2018 P.5,continue,Create your AHDL file,12/8/201812/8/2018 P.6,continue,save your ADHL file as name.TDF,12/8/201812/8/2018 P.7,continue.,12/8/201812/8/2018 P.8,Error Location duri
4、ng Compilation,Easy to locate the error,12/8/201812/8/2018 P.9,AHDL Template,12/8/201812/8/2018 P.10,General AHDL Format,SUBDESIGN decode1 ( input_pin_name : INPUT; input_bus_name150 : INPUT; output_pin_name : OUTPUT; output_bus_name : OUTPUT; ) BEGIN ouptut_pin_name = input_pin_name; output_bus_nam
5、e = input_bus_name; END;,Key Word,Defien I/O port,Logic,AHDL format,12/8/201812/8/2018 P.11,Your First AHDL design - Address Decoder,Chip_enable = a0 & a1 & a2 & !a3,SUBDESIGN decode1 ( a30 : input; chip_enable : output; ) begin chip_enable = (a30 = H“7“); end;,12/8/201812/8/2018 P.12,Why I use AHDL
6、 instead of Graphic,Easy to Modify Document during the coding I want to decode H”A” not H”7”,SUBDESIGN decode1 ( a30 : input; chip_enable : output; ) begin chip_enable = (a30 = H“A“); end;,Self Explain the Function,Only thing to change,Need more effort to modify,Chip_enable = !a0 & a1 & !a2 & a3,12/
7、8/201812/8/2018 P.13,More,SUBDESIGN decode1 ( a30 : input; chip_enable : output; ) begin chip_enable = (a30 = B“1x0x“); end;,Some bit can be ignore for comparsion,12/8/201812/8/2018 P.14,Something you need to know,Addition : + Subtraction : - Numeric Equality : = Not equal to : != Greater than : Gre
8、ater than or equal to : = Less than : Less than or equal to : = Logical OR : # Logical AND : &,12/8/201812/8/2018 P.15,Use Constant Function,Use Constant if the same number, text string, or arithematic expression is repeated several times in a file Advantage Only one statement needs to be changed,CO
9、NSTANT IO_ADDRESS = H“A“; SUBDESIGN decode1 ( a30 : input; chip_enable : output; ) begin chip_enable = (a30 = IO_ADDRESS); if (a30 = IO_ADDRESS) then . end;,Define CONSTANT before SUBDESIGN keyword,12/8/201812/8/2018 P.16,More about Constant,Constant example Constant IO_ADDRESS = H”370”; Constant FO
10、O = 1+2*3 - LOG2(256); Constant FOO_PLUS_one = FOO + 1;,12/8/201812/8/2018 P.17,Implement Combinational Logic,out1 = a0 & !a1 out2 = a0 & !a1 # b,AHDL ?,12/8/201812/8/2018 P.18,Define NODEs,AHDL ?,out2 = a0 & !a1 # b out3 = a0 & !a1 & d,temp,12/8/201812/8/2018 P.19,Bus Operation,SUBDESIGN decode1 (
11、a30, b30 : input; out30 : output; ) begin out0 = a0 ,12/8/201812/8/2018 P.20,More on Bus Operation,Bus Operation a90, b90 a = b; a74 = b96; a98 = VCC; a98 = 1; a98 = 2; a98 = 3; a30 = GND a30 = 0; temp = b0 a21 = temp,a7=b9, a6=b8, a5=b7, a4=b6,a98 connect to VCC,a98 = B”01”,a98 = B”10”,a98 = B”11”,
12、a30 connect to GND,a30 = B”0000”,a2 = temp, a1 = temp,12/8/201812/8/2018 P.21,Advance Bus Operation,Bus b30 b3, b2, b1, b0 (having 4 members) MSB is b3, LSB is b0 ARRAY BUS a3020 a3_2, a3_1, a3_0, a2_2, a2_1, a2_0, a1_2, a1_1, a1_0, a0_2, a0_1, a0_0 (having 12 members) MSB is a3_2, LSB is a0_0,12/8/
13、201812/8/2018 P.22,Truth Table,i30 Segment 7 0 0 1 1 2 2 F F,How easy to make any modification,12/8/201812/8/2018 P.23,IF-THEN-ELSE,SUBDESIGN priority ( low, medium, high : input; highest_level30 : output; ) begin if ( high = B”1”) then highest_level = B”1000”; elsif (medium = B”1”) then highest_lev
14、el = B”0100”; elsif (low = B”1”) then highest_level = B”0010”; else highest_level = B”0001”; end if; end;,12/8/201812/8/2018 P.24,Need 4 LCELL,12/8/201812/8/2018 P.25,CASE Statement,SUBDESIGN decoder (low, medium, high : input; highest_level30 : output; ) variable code20 : node; begin code2=high; co
15、de1=medium; code0=low; case code is when 4 = highest_level = B”1000”; when 2 = highest_level = B”0100”; when 1 = highest_level = B”0010”; when others = highest_level = B”0001”; end case; end;,What is the usage of this statement,12/8/201812/8/2018 P.26,12/8/201812/8/2018 P.27,For Loop,CONSTANT num_of_bit = 8; SUBDESIGN numbit ( anum_of_bit0 : input; bnum_of_bit0 : output; ) begin b8 = a0; b7 = a1; b6 = a2; b5 = a3; b4 = a4; b3 = a5; b2 = a6; b1 = a7; b0 = a8; end;,12/8/201812/8/2018 P.28,AH
