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1、This is information on a product in full production. November 2015DocID14611 Rev 121/144 STM32F103xC, STM32F103xD, STM32F103xE High-density performance line ARM-based 32-bit MCU with 256 to 512KB Flash, USB, CAN, 11 timers, 3 ADCs, 13 communication interfaces Datasheet production data Features Core:
2、 ARM 32-bit Cortex-M3 CPU 72 MHz maximum frequency, 1.25 DMIPS/MHz (Dhrystone 2.1) performance at 0 wait state memory access Single-cycle multiplication and hardware division Memories 256 to 512 Kbytes of Flash memory up to 64 Kbytes of SRAM Flexible static memory controller with 4 Chip Select. Supp
3、orts Compact Flash, SRAM, PSRAM, NOR and NAND memories LCD parallel interface, 8080/6800 modes Clock, reset and supply management 2.0 to 3.6 V application supply and I/Os POR, PDR, and programmable voltage detector (PVD) 4-to-16 MHz crystal oscillator Internal 8 MHz factory-trimmed RC Internal 40 kH
4、z RC with calibration 32 kHz oscillator for RTC with calibration Low power Sleep, Stop and Standby modes VBAT supply for RTC and backup registers 3 12-bit, 1 s A/D converters (up to 21 channels) Conversion range: 0 to 3.6 V Triple-sample and hold capability Temperature sensor 2 12-bit D/A converters
5、 DMA: 12-channel DMA controller Supported peripherals: timers, ADCs, DAC, SDIO, I2Ss, SPIs, I2Cs and USARTs Debug mode Serial wire debug (SWD) MemoryType = FSMC_MemoryType_CRAM; WriteBurst = FSMC_WriteBurst_Enable; CLKDivision = 1; (0 is not supported, see the STM32F10xxx reference manual) DataLaten
6、cy = 1 for NOR Flash; DataLatency = 0 for PSRAM Figure 28. Synchronous multiplexed NOR/PSRAM read timings ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? DocID14611 Rev 1273/144 STM32F103xC, STM32F103xD, STM32F103xEElectrical characteristics 136 Table 35. Synchronous multiplexed NO
7、R/PSRAM read timings(1)(2) 1.CL = 15 pF. 2.Guaranteed by characterization results. SymbolParameterMinMaxUnit tw(CLK)FSMC_CLK period27.7- ns td(CLKL-NExL)FSMC_CLK low to FSMC_NEx low (x = 0.2)-1.5 ns td(CLKL-NExH)FSMC_CLK low to FSMC_NEx high (x = 0.2)2- ns td(CLKL-NADVL)FSMC_CLK low to FSMC_NADV low
8、-4 ns td(CLKL-NADVH)FSMC_CLK low to FSMC_NADV high5- ns td(CLKL-AV)FSMC_CLK low to FSMC_Ax valid (x = 16.25)-0 ns td(CLKL-AIV)FSMC_CLK low to FSMC_Ax invalid (x = 16.25)2- ns td(CLKL-NOEL)FSMC_CLK low to FSMC_NOE low-1 ns td(CLKL-NOEH)FSMC_CLK low to FSMC_NOE high 1.5- ns td(CLKL-ADV)FSMC_CLK low to
9、 FSMC_AD15:0 valid-12 ns td(CLKL-ADIV)FSMC_CLK low to FSMC_AD15:0 invalid0- ns tsu(ADV-CLKH) FSMC_A/D15:0 valid data before FSMC_CLK high 6- ns th(CLKH-ADV)FSMC_A/D15:0 valid data after FSMC_CLK high0- ns tsu(NWAITV-CLKH)FSMC_NWAIT valid before FSMC_CLK high8- ns th(CLKH-NWAITV)FSMC_NWAIT valid afte
10、r FSMC_CLK high2- ns Electrical characteristicsSTM32F103xC, STM32F103xD, STM32F103xE 74/144DocID14611 Rev 12 Figure 29. Synchronous multiplexed PSRAM write timings ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? DocID14611 Rev 1275/144 STM32F103xC, STM32F103xD, STM32F103xEElectrical characteristic
11、s 136 Table 36. Synchronous multiplexed PSRAM write timings(1)(2) 1.CL = 15 pF. 2.Guaranteed by characterization results. SymbolParameterMinMaxUnit tw(CLK)FSMC_CLK period27.7- ns td(CLKL-NExL)FSMC_CLK low to FSMC_Nex low (x = 0.2)-2 ns td(CLKL-NExH)FSMC_CLK low to FSMC_NEx high (x = 0.2)2- ns td(CLK
12、L-NADVL)FSMC_CLK low to FSMC_NADV low-4 ns td(CLKL-NADVH)FSMC_CLK low to FSMC_NADV high5- ns td(CLKL-AV)FSMC_CLK low to FSMC_Ax valid (x = 16.25)-0 ns td(CLKL-AIV)FSMC_CLK low to FSMC_Ax invalid (x = 16.25)2- ns td(CLKL-NWEL)FSMC_CLK low to FSMC_NWE low-1 ns td(CLKL-NWEH)FSMC_CLK low to FSMC_NWE hig
13、h1- ns td(CLKL-ADV)FSMC_CLK low to FSMC_AD15:0 valid-12 ns td(CLKL-ADIV)FSMC_CLK low to FSMC_AD15:0 invalid3- ns td(CLKL-Data)FSMC_A/D15:0 valid after FSMC_CLK low-6 ns td(CLKL-NBLH)FSMC_CLK low to FSMC_NBL high1- ns tsu(NWAITV-CLKH)FSMC_NWAIT valid before FSMC_CLK high7- ns th(CLKH-NWAITV)FSMC_NWAIT valid after FSMC_CLK high2- ns Electrical characteristicsSTM32F103xC, STM32F103xD, STM32F103xE 76/144DocID14611 Rev 12 Figure 30. Synchronous non-multiplexed NOR/PSRAM read timings Table 37. Synchronous non-multiplexed NOR/PSRAM read timings(1)(2) 1.CL = 15 pF. 2.Guar
