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1、数字逻辑电路 Digital Logic Circuit,2011 Spring,1,Lec20 Principle of Memory Devices,1. Overview 2. ROM（只读存储器） 3. SRAM（静态随机存储器） 4. DRAM（动态随机存储器） 5. Applications,2,1. Overview,Memory Keeping information Binary: 1,0,3,Memory structure 【1】,1-bit memory Flip-flop, latch 4-bit memory N=4，74x175,4,Memory structur
2、e 【2】,8-bit memory N=8， 74x374 N-bit memory N=1024,1024 line! Too many Pins How to read easily?,5,Memory structure 【3】,Method One: 1-bit mux output,A9,A8,A1,A0,1024x1,1024,Q,Mux,6,Memory structure 【4】,Method Two: 8 bits output,Mux,A6,A5,A1,A0,Q0,Mux,128x1,Q7,128x1,Address Line A60,Data line D70,7,Me
3、mory structure 【4】,Basic structure,Memory,A60,Q70,How to Read Read,How to Load Write,D70,8,Memory structure 【4】,Dual-port memory,Memory,A60,Q70,D70,9,Memory structure 【4】,Single-port memory,Memory,A60,Q70,D70,Memory,A60,DQ70,如何处理？TriState,10,2. ROM（只读存储器）,Read-Only Memory Nonvolatile(非易失性存储器),11,8x4
4、 ROM,Information:?,Word line 字线,Bit line 位线,12,MOS Transistor,13,two-dimensional decoding(二维译码) 128x1,Information:? 1111111 ?,14,1,Examples ：32kx8 ROM,15,ROM Classification,16,Mask ROM,Mask ROMmask-programmable ROM Mask PC BIOS IBM PC,17,PROM,PROM Programmable Read-only Memory OTP ：One-time Programm
5、able Programmer Fusible link Diode + Fuse,18,EPROM,EPROM Erasable Programmable Read-only Memory Floating-gate MOS transistor 10 Year, 70%, 125C,19,Programmer,20,EPROM,Erasing UV：20-30 min Muliti-time Programmable,21,EERPOM,EERPOM/ Flash memory Electrically Erasable Programmable Read-only Memory Eras
6、e 10,000次,Tunneling effect,22,Flash Memory,EEPROM Block erase,23,ROM control,24,Read Timing,Taa Access time from address Tacs Access time from chip select Toe Output-enable time Toz Output disable time Toh Output hold time,25,EEPOMs,26,More ROM 4 32kx8 128kx8,Questions: How to make 4 32kx8 as 64Kx16
7、?,27,Questions: How to make 4 pcs of 32kx8 as 64Kx16?,28,2.SRAM,Read/Write Memory Random-access Memory Volatile memory Including Static RAM DRAM,29,RAM structure,30,SRAM Cell SRAM: Static RAM,Function SEL_L ， OUT=Qo SEL_L and WR_L, Q=D=IN Structure D flip-flop 4-6 transistors,31,Structure of SRAM,32
8、,Timing for Read Operation,33,Timing for Write Operation WE-CONTROL Write,Tas Address setup time before write Tah Address hold time after write Tcsw Chip select setup before end of write Twp Write-pulse width Tds Data setup time before end of write Tdh Data hold time after end of write,34,Timing for
9、 Write Operation CS-Control Write,35,SRAMs,8kx8,32kx8,128kx8,512kx8,36,SRAM data bus control,37,Dual Port,SP_RAM DP_RAM FIFO,38,3.DRAM Dynamic RAM,Basic principles Refresh cycle 64ms,39,The internal structure of SDRAM 4Mbit,？,？,Synchronous,40,SDRAM Read Timing,41,SDRAM Write Timing,42,SDRAM burst re
10、ad and write sequential,43,Self-refresh Cycle(自动刷新),Self-refresh counter 12 bit 4096/64ms,44,SDRAM devices,45,4. Memory Application,PROM as Truth Table,46,4.1 Combinational logic,47,74x139: Dual 2-4 decoder,48,PROM,49,Review：FPGA Configurable Logic Block,Combinational logic Sequential Logic,LUT： Loo
11、k Up Table = Truth table, F（F1,F2,F3,F4),50,4.2 Arithmetic : Multiplication/Division,51,Arithmetic : Addition,52,53,54,4.3 Waveform Generator,55,4.4 Interface Logic FIFO,56,Lec20 Principle of Memory Devices,1. Overview 2. ROM（只读存储器） 3. SRAM（静态随机存储器） 4. DRAM（动态随机存储器） 5. Applications,57,Memory Catalog,ROM MROM PROM EPROM EEPROM FLASH RAM SRAM SSRAM DRAM SDRAM ,58,Homework,Reading P580-610 Home work 9.5，9.12，9.18,59,
