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1、理工大学学士学位论文I摘 要快速傅立叶变换(FFT)作为时域和频域转换的基本运算,是数字谱分析的必要前提。传统的 FFT 使用软件或 DSP 实现,高速处理时实时性较难满足,因此专用集成电路(ASIC)和可编程逻辑器件(以现场可编程门阵列 FPGA 为代表)应运而生。速度上ASIC 更占优势,但是随着点数的增加,芯片面积将迅速扩大,也就意味着成本的提高。而 FPGA 内部含有硬件乘法器,大量的存储单元和可编程 I/O,十分适合于 FFT 处理器的实现,而且相对 ASIC,成本低廉,可以反复编程,便于调试,也更具市场竞争力。本文应用 Verilog 语言完成 32 点基-2 复数的 FFT 处理
2、系统设计,包括蝶形运算单元设计、存储单元设计、块浮点单元设计、地址产生单元设计、功能切换单元设计以及时序控制单元的设计工作。以选取的 FPGA 器件库为基础,使用 modelsim 软件进行仿真,并对结果进行分析。关键词:快速傅立叶变换;Verilog;单元设计;modelsim 仿真理工大学学士学位论文IIAbstractFast Fourier Transform is a necessary precondition of digital spectral analysis as the basic computing between the time domain and freque
3、ncy domain. The traditional FFT uses software or DSP to realize, which is difficult to meet real-time in high speed processing. Application specific integrated circuit (ASIC) and programmable logic device (represented by field programmable gate array, FPGA) arises at the historic moment. ASIC has th
4、e advantage in the speed, but the chip area will expand rapidly with the processing points increasing, which means the improvement of costs. While FPGA contains hardware multipliers, massive memory cells and programmable I/O, so it is very suitable for implementation of FFT processor. Therefore, FPG
5、A is low-cost, easy to debug and can be repeatedly programmed. It has more market competitiveness.Use Verilog language completed 32 points 2 complex FFT processing system design, Including butterfly computing unit design, storage unit design, block floating-point unit design, the address generation
6、unit design, the function switch unit design and timing control unit design work . On the basis of the selected library as the FPGA device, use the modelsim simulation software, and analyze the results.Key Words:FFT;Verilog;Unit design;modelsim simulation理工大学学士学位论文III目 录1 绪论 .11.1 课题的背景及意义.11.2 FFT
7、的国内外发展研究现状.21.2.1 通用数字信号处理芯片.21.2.2 专用集成电路芯片 ASIC.31.2.3 可编程逻辑器件.31.3 篇章结构.52 离散福利叶变换的快速算法的基本理论 .62.1 基-2FFT 算法 .62.2 定点数的相关概念.152.2.1 定点数的定义.152.2.2 定点数加减法的溢出及检测方法.152.3 定点数的定标.162.4 有限字长效应.162.5 块浮点数.173 FFT 的算法设计.183.1 FFT 处理器的实现框图.183.2 蝶形运算单元的设计.183.3 流水线结构.253.4 存储单元的设计.263.4.1 FFT 数据存取规律分析.263.4.2 双口 RAM 及其地址发生器的设计.273.4.3 ROM 及其地址发生器的设计.303.5 浮点单元的设计.333.6 时序控制单元的设计.384 基于 verilog 语言的 FFT 的设计与仿真 .404.1 ModelSim 介绍.404.2 ModelSim 仿真.404.2.1 建立工程.41理工大学学士学位论文IV4.2.2 加载文件.4