《基于matalb的数据采集器设计外文原文》由会员分享，可在线阅读，更多相关《基于matalb的数据采集器设计外文原文（9页珍藏版）》请在金锄头文库上搜索。
1、First Experience with the Scalable Coherent InterfaceH.MllerECP Division, CERN, CH 1211 Geneva 23 Switzerland and A.Bogaerts ，J.Buytaert ，R.Divi , A.Ivanov , R.Keyser , F.Lozano-Alemany , 111213G.Mugnai , D.Samyn ,B.Skaali114RD24 Collaboration, CERN, CH 1211 Geneva 23, SwitzerlandAbstract The resear
2、ch project RD24 11 is studying applications of the Scalable Coherent Interface (IEEE-1596) standard for the large hadron collider (LHC). First SCI node chips from Dolphin were used to demonstrate the use and functioning of SCIs packet protocols and to measure data rates. We present results from a fi
3、rst,two-node SCI ringlet at CERN, based on a R3000 RISC processor node and DMA node on a MC68040 processor bus. A diagnostic link analyzer monitors the SCI packet protocols up to full link bandwidth. In its second phase, RD24 will build a first implementation of a multi-ringlet SCI data merger.I. BA
4、SICS of SCI SCI 1 provides bus like features between SCI nodes in a ringlet. Point-to-point links interconnect the inputs and outputs of SCI nodes (fig 1). These transmit incoming packets either to the output link, or direct them into an input FIFO. Packets which are generated by user-logic on the C
5、bus 2 side are queued in an output FIFO until the bypass FIFO is empty. In this way, several nodes in a ringlet may be receiving and transmitting simultaneously at the intrinsic node-chip speed to achieve a ringlet bandwidth which is significantly higher than the node chip bandwidth SCI links transp
6、ort packets as shown schematically in fig 2. A flag signal delimits packets which are composed of data or control symbols, clocked at every transition of the SCI clock. The 16 bit wide link of a GaAS NodeChip 3 from Dolphin transmits one 16 bit symbol every 2 ns, resulting in a raw link bandwidth of
7、 1 Gbyte/s. SCI packets are framed by a header, containing address and command fields, and a CRC trailer. Transactions consist of two subactions: during the request subaction a packet containing address, command and optionally data is sent to a responder node. After its intrinsic latency, the respon
8、der starts the response subaction, which in case of a read transaction returns data via a response packet. Typical transactions, implemented in the first node chips are: read/write cached or noncached 64 byte, read/write 1 to 16 byte noncached, and move 64 byte transactions. SCI uses 64 bit addresse
9、s. The upper 16 bits specify the node-identifier within a 64K node address space.1. CERN, Geneva Switzerland 2. IHEP Protvino, Russia 3. Universidad Politecnica de Madrid, Spain 4. University of OSLO, Physics Department, NorwayFigure 1: Nodes and RingletsFigure 2: Signals and Packets The remaining 4
10、8 bits are the internal byte address in that node. SCI complies fully with the IEEE 1212 CSR standard 4.II. A PREVIEW of SCI for DATA ACQUISITION Data acquisition systems in High Energy Physics experiments are faced with increasing demands in size and data rates. New approaches are being investigate
11、d 5 within a series of research projects. The project RD24 has demonstrated that SCI can be used to build systems which scale in size and performance beyond the limits of conventional bus systems. The first experience gained with the construction of a multi-node SCI ringlet system, including the des
12、ign of prototype SCI processor and memory nodes allows us to preview the possibility to build large and uniform SCI systems with the following advantages: Data rates beyond 100 Mbyte/s per individual channel Link speeds at 1 Gbyte/s Simultaneous (split) transactions between nodes Shared memory or da
13、ta-driven systems Short and long distances VLSI chips with both requester and responder protocols Optional use of caches and cache-coherency to reduce latencies and avoid event copies As a first SCI implementor, RD24 investigates in several project phases, the applicability of SCI to key areas of Da
14、ta Acquisition Systems. The areas of interest for application of SCI in a typical Data Acquisition system are shown in fig 3:1) Access to numerous data buffers after first reduction and compression processors, typically dual ported memories2) High rate data collection over distance using optical fib
15、ers 3) Crossover network to coherently build events from randomly distributed event fragmentsFigure 3: Data Acquisition areas for SCI A. Multiple Ringlet DAQ System Several physical SCI implementations are becoming available shortly to allow design of multi-ringlet SCI systems for data collection (m
16、erging ) of high rate data over distance (fig 4). High rate HEP experiments can use SCI ringlets to merge SCI data streams over optical SCI fibers from distributed detector sources. CPU farms, investigating event by event in real time, can be interfaced via SCI-processor interfaces. Data from the detectors digitizing stages can be connected via CMOS SCI ringlets. These low cost nodechips 2, i
