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1、附 录附录 A 英文原文TOPSwitch FamilyThree-terminal Off-line PWM SwitchTOPSwitch device belongs to three-line PWM switch. It is a new type of IC which merges PWM and MOSFET. It has many advantages: small volume, light weight,high density and low cost. High frequency switching power supply made from it can no
2、 t only simplify the circuit, but also can imp rove the EMC characteristics and reduce the cost.The TOPSwitch family implements, with only three pins, allfunctions necessary for an off-line switched mode control system: high voltage N-channel power MOSFET with controlled turn-on gate driver, voltage
3、 mode PWM controller with integrated 100 kHz oscillator, high voltage start-up bias circuit,bandgap derived reference, bias shunt regulator/error amplifier for loop compensation and fault protection circuitry. Compared to discrete MOSFET and controller or self oscillating (RCC) switching converter s
4、olutions, a TOPSwitch integrated circuit can reduce total cost, component count, size,weight and at the same time increase efficiency and system reliability. These devices are intended for 100/110/230 VAC off-line Power Supply applications in the 0 to 100 W (0 to 50 W universal) range and 230/277 VA
5、C off-line power factor correction (PFC) applications in the 0 to 150 W range.Pin Functional DescriptionDRAIN Pin:Output MOSFET drain connection. Provides internal bias current during start-up operation via an internal switched highvoltage current source. Internal current sense point.CONTROL Pin:Err
6、or amplifier and feedback current input pin for duty cycle control. Internal shunt regulator connection to provide internal bias current during normal operation. Trigger input for latching shutdown. It is also used as the supply bypass and auto-restart/ compensation capacitor connection point.SOURCE
7、 Pin:Output MOSFET source connection. Primary-side circuit common, power return, and reference point.TOPSwitch Family Functional DescriptionTOPSwitch is a self biased and protected linear control current-to-duty cycle converter with an open drain output. High efficiency is achieved through the use o
8、f CMOS and integration of the maximum number of functions possible. CMOS significantly reduces bias currents as compared to bipolar or discrete solutions. Integration eliminates external power resistors used for current sensing and/or supplying initial start-up bias current. During normal operation,
9、 the internal output MOSFET duty cycle linearly decreases with increasing CONTROL pin current as shown in Figure 4. To implement all the required control, bias, and protection functions, the DRAIN and CONTROL pins each perform several functions as described below.Refer to Figure 2 for a block diagra
10、m and Figure 6 for timing and voltage waveforms of the TOPSwitch integrated circuit.Control Voltage SupplyCONTROL pin voltage VC is the supply or bias voltage for the controller and driver circuitry. An external bypass capacitor closely connected between the CONTROL and SOURCE pins is required to su
11、pply the gate drive current.The total amount of capacitance connected to this pin (CT) also sets the auto-restart timing as well as control loop compensation. VC is regulated in either of two modes of operation. Hysteretic regulation is used for initial start-up and overload operation. Shunt regulat
12、ion is used to separate the duty cycle error signal from the control circuit supply current. During start-up, VC current is supplied from high-voltage switched current source connected internally between the DRAIN and CONTROL pins. The current source provides sufficient current to supply the control
13、 circuitry as well as charge the total external capacitance (CT).TOPSwitch Family Functional Description (cont.)The first time VC reaches the upperthreshold, the high-voltage currentsource is turned off and the PWM modulator and output transistor areactivated, as shown in Figure 5(a). During normal
14、operation (when the output voltage is regulated) feedback control current supplies the VC supply current. The shunt regulator keeps VC at typically 5.7 V by shunting CONTROL pin feedback current exceeding the required DC supply current through the PWM error signal sense resistor RE. The low dynamic
15、impedance of this pin (ZC) sets the gain of the error amplifier when used in a primary feedback configuration. The dynamic impedance of the CONTROL pin together with the external resistance and capacitance determines the control loop compensation of the power system. If the CONTROL pin external capa
16、citance (CT) should discharge to the lower threshold, then the output MOSFET is turned off and the control circuit is placed in a low-current standby mode. The high-voltage current source is turned on and charges the external capacitance again. Charging current is shown with a negative polarity and discharging current is shown with a positive polarity in Figure 6. The hysteretic auto-restart comparator keeps VC within a window of typically 4.7 to 5.7 V by turning the high-v