北京大学基于单片机毕业外文文献翻译

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1、本科毕业设计(论文)AT89S52 单片机应用中英文翻译专业名称: 电气工程及其自动化 年级班级: 学生姓名: 指导老师: 北京大学电气学院二 O 一七年六月九日1AT89S52 MCU ApplicationsFunction Characteristic DescriptionThe AT89S52 is a low-power, high-performance CMOS 8-bit microcontroller with 8K bytes of in-system programmable Flash memory. The device is manufactured using

2、Atmels high-density nonvolatile memory technology and is compatible with the indus-try-standard 80C51 instruction set and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory pro-grammer. By combining a versatile 8-bit CPU with in-s

3、ystem programmable Flash on a monolithic chip, the Atmel AT89S52 is a powerful microcontroller which provides a highly-flexible and cost-effective solution to many embedded control applications.The AT89S52 provides the following standard features: 8K bytes of Flash, 256 bytes of RAM, 32 I/O lines, W

4、atchdog timer, two data pointers, three 16-bit timer/counters, a six-vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator, and clock circuitry. In addition, the AT89S52 is designed with static logic for operation down to zero frequency and supports two software sele

5、ctable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port, and interrupt system to continue functioning. The Power-down mode saves the RAM con-tents but freezes the oscillator, disabling all other chip functions until the next interrupt or hardware re

6、set.Pin DescriptionVCC :Supply voltage.GND :Ground.Port 0:Port 0 is an 8-bit open drain bidirectional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high-impedance inputs. Port 0 can also be configured to be the multiplexe

7、d low-order address/data bus during accesses to external program and data memory. In this mode, P0 has internal pull-ups. Port 0 also receives the code bytes during Flash programming and outputs the code bytes dur-ing program verification. External pull-ups are required during program verification.P

8、ort 1:Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled 2high by the inter-nal pull-ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled lo

9、w will source current (IIL) because of the internal pull-ups. In addition, P1.0 and P1.1 can be configured to be the timer/counter 2 external count input (P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX), respectively, as shown in the follow-ing table 1. Port 1 also receives the low-order

10、address bytes during Flash programming and verification.Table 1 The second function of the P1 portPort Pin Alternate FunctionsP1.0 T2 (external count input to Timer/Counter 2), clock-outP1.1 T2EX (Timer/Counter 2 capture/reload trigger and direction control)P1.5 MOSI (used for In-System Programming)

11、P1.6 MISO (used for In-System Programming)P1.7 SCK (used for In-System Programming)Port 2:Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the inter-nal pull-ups an

12、d can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups. Port 2 emits the high-order address byte during fetches from external program memory and dur-ing accesses to external data memory that use 16-bit addresses

13、 (MOVX DPTR). In this application, Port 2 uses strong internal pull-ups when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits and some control signa

14、ls during Flash program-ming and verification.Port 3:Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the inter-nal pull-ups and can be used as inputs. As inputs, P

15、ort 3 pins that are externally being pulled low will source current (IIL) because of the pull-ups. Port 3 receives 3some control signals for Flash programming and verification. Port 3 also serves the functions of various special features of the AT89S52, as shown in the fol-lowing table 2.Table 2 The

16、 second function of the P3 portPort Pin Alternate FunctionsP3.0 RXD (serial input port)P3.1 TXD (serial output port)P3.2 (external interrupt 0)INT0P3.3 (external interrupt 1)1P3.4 T0 (timer 0 external input)P3.5 T1 (timer 1 external input)P3.6 (external data memory write strobe)WRP3.7 (external data memory read strobe)DRST:Reset input. A high on this pin for two machine cycles while the oscillator is running re

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