msp430g2553定时器a

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1、Chapter 12SLAU144IDecember 2004Revised January 2012Timer_ATimer_A is a 16-bit timer/counter with multiple capture/compare registers. This chapter describes theoperation of the Timer_A of the MSP430x2xx device family.Topic . Page12.1 Timer_A Introduction . 36412.2 Timer_A Operation . 36512.3 Timer_A

2、Registers . 377第12章SLAU144I 2004年12月2012年1月修订定时器A定时器A是与多个捕获/比较寄存器的16位定时器/计数器。本章介绍MSP430x2xx器件系列定时器A 的操作。主题页12.1定时器A介绍. . 36412.2定时器A的操作. . 36512.3定时器A寄存器. . 37712.1 Timer_A IntroductionTimer_A is a 16-bit timer/counter with three capture/compare registers. Timer_A can support multiplecapture/compare

3、s, PWM outputs, and interval timing. Timer_A also has extensive interrupt capabilities.Interrupts may be generated from the counter on overflow conditions and from each of thecapture/compare registers.12.1定时器 A 简介定时器 A 是一个 16位定时器 /柜台三个捕捉/比较寄存器。定时器 A 可以支持多个捕捉/比较 PWM 输出,间隔的时间。定时器 A 还拥有丰富的中断功能。从计数器溢出条件

4、,并从每个可能会产生中断捕捉/比较寄存器。Timer_A features include:定时器 A 的功能包括: Asynchronous 16-bit timer/counter with four operating modes Selectable and configurable clock source Two or three configurable capture/compare registers Configurable outputs with PWM capability Asynchronous input and output latching Interrup

5、t vector register for fast decoding of all Timer_A interrupts异步 16 位定时器 /计数器四种工作模式可选择的和可配置的时钟源两个或三个可配置的捕捉/比较寄存器可配置的输出 PWM 功能异步输入和输出锁存快速解码的所有定时器 A 中断的中断向量寄存器The block diagram of Timer_A is shown in Figure 12-1.(定时器 A 的框图如图12-1所示)NOTE: Use of the Word CountCount is used throughout this chapter. It mea

6、ns the counter must be in the process ofcounting for the action to take place. If a particular value is directly written to the counter,then an associated action will not take place.注意:使用的字数注意: 使用的单词计数在本章中使用计数。这意味着该计数器的过程中必须是计数为采取的行动。如果一个特定的值直接写入计数器,然后执行相应的操作不会发生。12.2 Timer_A Operation(12.2 定时器A操作)T

7、he Timer_A module is configured with user software. The setup and operation of Timer_A is discussed inthe following sections.定时器A模块与用户软件配置。定时器 A的设置和操作进行了讨论以下各节12.2.1 16-Bit Timer Counter( 12.2.1 16位定时器计数器 )The 16-bit timer/counter register, TAR, increments or decrements (depending on mode of operati

8、on) witheach rising edge of the clock signal. TAR can be read or written with software. Additionally, the timer cangenerate an interrupt when it overflows16位定时器/计数器寄存器,焦油,递增或递减(取决于操作模式)每个时钟信号的上升沿。西藏自治区可以阅读或编写的软件。此外,定时器可以溢出时产生中断TAR may be cleared by setting the TACLR bit. Setting TACLR also clears th

9、e clock divider and countdirection for up/down mode.TAR 可清除设置TACLR位。设置 TACLR也清除时钟分频器和计数方向向上/向下模式。定时器A操作NOTE: Modifying Timer_A Registers(注:修改定时器 A 寄存器)It is recommended to stop the timer before modifying its operation (with exception of theinterrupt enable, and interrupt flag) to avoid errant operat

10、ing conditions.建议之前停止修改其运作的定时器(与例外中断使能,中断标志) ,以避免犯错误的操作。When the timer clock is asynchronous to the CPU clock, any read from TAR should occurwhile the timer is not operating or the results may be unpredictable. Alternatively, the timermay be read multiple times while operating, and a majority vote t

11、aken in software todetermine the correct reading. Any write to TAR will take effect immediately.当定时器的时钟是异步的 CPU 时钟,读任何从西藏自治区应该发生当定时器不工作或可能是不可预知的结果。另外,定时器可多次读取操作时,多数票软件采取确定正确的读数。任何写入到西藏自治区将立即生效。12.2.1.1 Clock Source Select and Divider(12.2.1.1时钟源选择和分频)The timer clock can be sourced from ACLK, SMCLK,

12、or externally via TACLK or INCLK. The clock sourceis selected with the TASSELx bits. The selected clock source may be passed directly to the timer or divided by 2, 4, or 8, using the IDx bits. The timer clock divider is reset when TACLR is set.定时器的时钟可以来源于ACLK , SMCLK ,或外部,通过TACLK或INCLK 。时钟源被选中与TASSE

13、Lx位。选定的时钟源可以直接传递到计时器或除以2,4,或8个使用IDX位。定时器时钟分频器复位设置TACLR 时12.2.2 Starting the Timer( 12.2.2启动定时器 )The timer may be started, or restarted in the following ways: 计时器可以启动,或重新在以下方面:The timer counts when MCx 0 and the clock source is active. 定时器计数时 MCX 0和时钟源是积极的。 When the timer mode is either up or up/down

14、, the timer may be stopped by writing 0 to TACCR0. Thetimer may then be restarted by writing a nonzero value to TACCR0. In this scenario, the timer starts incrementing in the up direction from zero.当定时器模式是向上或向上/向下,定时器可以通过写0到 TACCR0停止。 “写一个非零值 TACCR0 ,然后重新启动定时器。在这种情况下,定时器启动从零向上的方向递增。12.2.3 Timer Mode Control( 12.2.3定时器模式控制 )The timer has four modes

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