数字逻辑设计及应用教学课件:3-1数字电路中的电气知识

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1、1,class-exercises,1、Write the 8421 binary- coded decimal , Gray code,excess-3 representations for the decimal numbers: 586 2、Indicate whether or not overflow occurs when adding the following 8-bit twos complement numbers:,2,class-exercises,1、Write the 8421 binary- coded decimal ,excess-3 ,Gray code

2、representations for the decimal numbers: 586. 010110000110, 100010111001,1101101111 2、Indicate whether or not overflow occurs when adding the following 8-bit twos complement numbers:,overflow,overflow,3,c h a p t e r 3 Digital Circuits数字电路,electrical aspects of digital circuits 数字电路中的电气知识,4,review,P

3、ositive logic and nagitive-logic (正逻辑和负逻辑) Three basic logics:AND,OR, and NOT Method:(方法) Truth table 真值表 Logic expression 逻辑表达式 Logic symbol 逻辑符号 NAND and NOR (与非和或非) Timing diagram 定时图,5,3.2 Logic Families(逻辑系列),A logic family is a collection of different integrated-circuit chips that have similar

4、 input, output, and internal circuit characteristics, but that perform different logic functions . Chips from the same family can be interconnected to perform any desired logic function. On the other hand, chips from differing families may not be compatible; they may use different power-supply volta

5、ges or may use different input and output conditions to represent logic values.,6,3.2 Logic Families (逻辑系列)(P85),1、transistor-transistor logic (TTL) (晶体管-晶体管逻辑) 2、CMOS(互补MOS) MOS :metal-oxide semiconductor (金属-氧化物半导体) complementary MOS (CMOS) 速度更高,功耗更低。,7,3.3 CMOS Logic DC供电电压,直流供电电压在逻辑图中被省略了,但它其实是连

6、接在芯片的VCC引脚上的,而地则连接在GND 引脚上。电压和地在内部被分配给IC中的所有元素。,8,3.3.1 CMOS Logic Levels CMOS逻辑电平 (P86),A typical CMOS logic circuit operates from a 5-volt power supply. 典型的CMOS逻辑电路在电源下工作! (3.3V工作的CMOS称为低电压CMOS。),9,3.3.2 MOS Transistors (MOS晶体管),Rds:压控电阻 Vgs(Vgs0) 增加, 则Rds减少),Vgs(Vgs0)减少,则Rds减少,10,3.3.3 Basic CMOS

7、 Inverter Circuit (P88)基本的CMOS反相器电路, 常开开关: 当控制信号为高电平时,开关接通。 (2) 常闭开关: 当控制信号为高电平时,开关断开。,Vin=1,11,Inverter Circuit 倒相器结构,Vin=0,Vout=1,in=0,out,12,Inverter Circuit 倒相器结构,Vin=1,Vout=0,in=1,out,13,CMOS inverter circuit (CMOS反相器)(P88),常闭,常开,常闭,常开,in,P 沟道,N沟道,采用器件实现逻辑关系,14,CMOS 2-input NAND gate 2输入CMOS与非门

8、(P90),Q2,15,CMOS INVERTER,16,CMOS inverter,取非再取非(CMOS缓冲器),17,CMOS 2-INPUT AND GATE,18,使用与非门还是或非门?,19,NAND VS. NOR(P92),CMOS NAND and NOR gates do not have identical performance. For a given silicon area, an n-channel transistor has lower “on” resistance than a p-channel transistor. Therefore, when t

9、ransistors are put in series, k n-channel transistors have lower “on” resistance than do k p-channel ones. As a result, a k-input NAND gate is generally faster than and preferred over a k-input NOR gate.,20,3.3.5 Fan-In(扇入)(P92),The number of inputs that a gate can have in a particular logic family

10、is called the logic familys fan-in.,21,串联晶体管导通电阻的可加性 限制了MOS门的扇入数,the fan-in of CMOS gates, typically to 6 for NAND gates.,the fan-in of CMOS gates, typically to 4 for NOR gates.,22,The additive “on” resistance of series transistors limits the fan-in of CMOS gates, typically to 4 for NOR gates and 6

11、for NAND gates.,The total delay through a 4-input NAND, a 2-input NOR, and an inverter is typically less than the delay of a one-level 8-input NAND circuit.,23,EXERCISE,24,ANSWER KEY FOR EXERCISE,AND-OR-INVERT (coms AOI )gate,25,3.4 Electrical Behavior of CMOS Circuits CMOS电路的电气特性(P96),Logic voltage

12、 levels. ( 逻辑电压电平) DC noise margins(直流噪声容限) Fanout.(扇出) Speed, Power consumption(速度、功耗) Noise, Electrostatic discharge(噪声、静电放电) Open-drain outputs. Three-state outputs (漏极开路输出、三态输出),26,3.5 CMOS Steady-State Electrical Behavior (P90),CMOS稳态电气特性,27,3.5.1 Logic Levels and Noise Margins 逻辑电平和噪声容限,28,CMOS逻辑系列(HC)电平规格,VCC0.1V,地0.1V,0.7VCC,0.3VCC,vcc,0,29,直流噪声容限(DC noise margin) 多大的噪声会使最坏输出电压被破坏得不可被输入端识别.,30%VCC,30,31,(P 175-176) 3.1 3.11, 3.12, 3.13 3.20,Please hand your home work on Next Tuesday!,HOMEWORK,

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