CD74HC541电子资料

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1、September 1983 Revised February 1999 MM74HC540 MM74HC541 Inverting Octal 3-STATE Buffer Octal 3-STATE Buffer 1999 Fairchild Semiconductor CorporationDS MM74HC540 MM74HC541 Inverting Octal 3-STATE Buffer Octal 3-STATE Buffer General Description The MM74HC540 and MM74HC541 3-STATE buffers uti- lize ad

2、vanced silicon-gate CMOS technology. They pos- sess high drive current outputs which enable high speed operation even when driving large bus capacitances. These circuits achieve speeds comparable to low power Schottky devices, while retaining the advantage of CMOS circuitry, i.e., high noise immunit

3、y, and low power consump- tion. Both devices have a fanout of 15 LS-TTL equivalent inputs. The MM74HC540 is an inverting buffer and the MM74HC541 is a non-inverting buffer. The 3-STATE con- trol gate operates as a two-input NOR such that if either G1 or G2 are HIGH, all eight outputs are in the high

4、-imped- ance state. In order to enhance PC board layout, the MM74HC540 and MM74HC541 offers a pinout having inputs and outputs on opposite sides of the package. All inputs are protected from damage due to static discharge by diodes to VCC and ground. Features I Typical propagation delay: 12 ns I 3-S

5、TATE outputs for connection to system buses I Wide power supply range: 26V I Low quiescent current: 80 A maximum (74HC Series) I Output current: 6 mA Ordering Code: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagrams Pin Assig

6、nments for DIP, SOIC, SOP and TSSOP Top View MM74HC540 Top View MM74HC541 Order NumberPackage NumberPackage Description MM74HC540WMM20B20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide MM74HC540SJM20D20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MM74HC540MTCM

7、TC2020-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide MM74HC540NN20A20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide MM74HC541WMM20B20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide MM74HC541SJM20D20-Lead Small Outline Package

8、(SOP), EIAJ TYPE II, 5.3mm Wide MM74HC541MTCMTC2020-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide MM74HC541NN20A20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide 2 MM74HC540 MM74HC541 Absolute Maximum Ratings(Note 1) (Note 2) Recommended Operating Cond

9、itions Note 1: Absolute Maximum Ratings are those values beyond which dam- age to the device may occur. Note 2: Unless otherwise specified all voltages are referenced to ground. Note 3: Power Dissipation temperature derating plastic “N” package: 12 mW/C from 65C to 85C. DC Electrical Characteristics

10、 (Note 4) Note 4: For a power supply of 5V 10% the worst case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V values should be used when designing with this supply. Worst case VIH and VIL occur at VCC = 5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst case l

11、eakage cur- rent (IIN, ICC, and IOZ) occur for CMOS at the higher voltage and so the 6.0V values should be used. Supply Voltage (VCC)0.5 to +7.0V DC Input Voltage (VIN)1.5 to VCC +1.5V DC Output Voltage (VOUT)0.5 to VCC +0.5V Clamp Diode Current (ICD)20 mA DC Output Current, per pin (IOUT)35 mA DC V

12、CC or GND Current, per pin (ICC)70 mA Storage Temperature Range (TSTG)65C to +150C Power Dissipation (PD) (Note 3)600 mW S.O. Package only500 mW Lead Temperature (TL) (Soldering 10 seconds)260C MinMaxUnits Supply Voltage (VCC)26V DC Input or Output Voltage (VIN, VOUT)0VCCV Operating Temperature Rang

13、e (TA)40+85C Input Rise or Fall Times (tr, tf) VCC = 2.0V1000ns VCC = 4.5V500ns VCC = 6.0V400ns SymbolParameterConditions VCC TA = 25CTA = 40 to 85C TA = 55 to 125C Units TypGuaranteed Limits VIHMinimum HIGH Level2.0V1.51.51.5V Input Voltage4.5V3.153.153.15V 6.0V4.24.24.2V VILMaximum LOW Level2.0V0.

14、50.50.5V Input Voltage 4.5V1.351.351.35V 6.0V1.81.81.8V VOHMinimum HIGH LevelVIN = VIH or VIL Output Voltage|IOUT| 20 A2.0V2.01.91.91.9V 4.5V4.54.44.44.4V 6.0V6.05.95.95.9V VIN = VIH or VIL |IOUT| 6.0 mA4.5V4.23.983.843.7V |IOUT| 7.8 mA6.0V5.75.485.345.2V VOLMaximum LOW LevelVIN = VIH or VIL Output

15、Voltage|IOUT| 20 A2.0V00.10.10.1V 4.5V00.10.10.1V 6.0V00.10.10.1V VIN = VIH or VIL |IOUT| 6.0 mA4.5V0.20.260.330.4V |IOUT| 7.8 mA6.0V0.20.260.330.4V IINMaximum InputVIN = VCC or GND6.0V0.11.01.0A Current IOZMaximum 3-STATE VIN = VIH or VIL, G = VIH 6.0V0.5510A Output LeakageVOUT = VCC or GND Current

16、 ICCMaximum QuiescentVIN = VCC or GND6.0V8.080160A Supply CurrentIOUT = 0 A MM74HC540 MM74HC541 AC Electrical Characteristics VCC = 5V, TA = 25C, tr = tf = 6 ns AC Electrical Characteristics VCC = 2.0V to 6.0V, CL = 50 pF, tr = tf = 6 ns (unless otherwise specified) Note 5: CPD determines the no load dynamic power consumption, PD = CPD VCC2f + ICC VCC, and the no load dynamic current consumption, IS = CPDVCCf + ICC. SymbolParameterConditionsTyp Guaranteed Units Limit tPHL,

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