计算机专业英语cha.ppt

《计算机专业英语cha.ppt》由会员分享，可在线阅读，更多相关《计算机专业英语cha.ppt（107页珍藏版）》请在金锄头文库上搜索。

1、Chapter 2 (计算机硬件计算机硬件)转载请注明http:/http:/ Section A CPU We build computer to solve problems. Early computer solved mathematical and engineering problems, and later computers emphasized information processing for business applications. Today, the computer also control machines as diverse as automobile,

2、 engines, robots, and microwave ovens. A computer system solves a problem from any of these domains by accepting input, processing it, and producing output. Computer systems consist of hardware and software. Hardware is the physical part of the system. Once designed, hardware is difficult and expens

3、ive to change. Software is the set of programs that instruct the hardware and is easier to modify than hardware. Computers are valuable because they are general-purpose machines that can solve many different kinds of problems, as opposed to special-purpose machines that can each solve only one kind

4、of problem. Different problems can be solved with the same hardware by supplying the system with a different set of instructions. That is, with different software. microwave maikruweiv n. 1. 微波 2. 微波炉 vt. 1. 用微波炉热(食物);用微波炉烹调domaindomen n. 1、领土, 领地, (活动、学问等的)范围, 领域 2、领土权3、(政府或私人的) 所有地, 地产 4、地区, 区域har

5、dware h h rd,wrd,w r r n. 1、(计算机的)硬件, (电子仪器的)部件 softwaresft,wr n. U1. 【电脑】软件My job is writing the software. 我的工作是写软件。 2. (跟随电子设备的)程序材料Instructionsnstrkn n. 1、指令,指示, 用法说明(书), 教育, 指导 2、命令,指示 +to-v +(that) 3、教诲;教导译 人们为解决问题而制造计算机。早期的计算机解决的是数学和工程问题, 后来计算机着重解决商业应用中的信息处理问题。如今, 计算机还用来控制如汽车发动机、机器人和微波炉等各式各样的机

6、器。计算机系统解决上述这些领域中的任何一个问题都是通过接收输入、处理问题和生成输出来实现的。 计算机系统由硬件和软件组成。硬件是系统的物理部分。硬件一旦设计完毕, 要修改是困难的, 并且花费也大。软件是指挥硬件的程序集合, 比硬件容易修改。计算机之所以有用,是因为它们能解决很多不同类型的问题, 是通用的机器。相对而言, 每种专用机只能解决一类问题。通过为系统配备不同的指令系统, 也就是配备不同的软件, 能用同一硬件去解决不同的问题。 Most computer systems, from the embedded controllers found in automobiles and con

7、sumer appliances to personal computers and mainframes, have the same basic organization. Every computer has four basic hardware components： Central processing unit(CPU). Main memory Input devices. Output devices.embeddedadj.1、植入的, 深入的, 内含的 2、嵌入的 3、嵌入式照明设备organization ,rgnzen n.1. 组织,机构,团体C2. 组织工作;体制

8、,编制UC3. 条理,系统U4. 【生】有机体C译 大多数计算机系统, 从汽车和日用电器中的嵌入式控制器到个人计算机和大型主机, 都具有相同的基本组成。每台计算机都有如下4种基本硬件部件： 中央处理器; 主存储器; 输入设备; 输出设备。 Fig. 2-1 shows these components in a block diagram. The lines between the blocks represent the flow of information flows from one component to another on the bus, which is simply a

9、 group of wires connecting the components. Processing occurs in the CPU and main memory. The organization in Fig. 2-1, with the components connected to each other by the bus, is common. However, the other configurations are possible as well. Computer hardware is often classified by its relative phys

10、ical size： Small microcomputer; Medium minicomputer; Large mainframe. configurationkn,fgjren n. 1. 结构;表面配置, 结构, ,外形 2. （心）形态 3. （天）行星的方位;(地球表面的)外貌Fig. 2-1 The basic architecture of microcomputer译 图2-1以一个框图的形式展示了这几种部件。各框之间的连线代表信息流在总线上从一个部件流向另一个部件, 总线简单地说就是连接各部件的一组线缆。处理是在CPU和主存储器中进行的。图2-1中通过总线相互连接的各部件

11、的组成是很常见的。当然, 也可能有其他配置。 计算机硬件常以相对体积大小来分类, 如下所示： 小型计算机; 中型计算机; 大型计算机。 Just the CPU of a mainframe often occupies an entire cabinet. Its input/ output(I/O) devices and memory might fill an entire room. Microcomputers can be small enough to fit on a desk or in a briefcase. As technology advances, amount

12、 of processing previously possible only on large machines becomes possible on smaller machines. Microcomputers now can do much of the work that only minicomputers or mainframes could do in the past. cabinetkbnt n. 1、(有抽屉或格子的)橱柜, 内阁 2、 内阁，全体阁员 3、私人小房间,密室Cadj.1. 内阁的 2. 私下的,秘密的译 一台大型机的CPU往往要占用一个机柜。它的输入

13、/输出(I/O)设备和存储器可能塞满一个屋子。微型计算机可以小到能放在桌子上或公文包里。随着技术的进步, 以前只能在大型机上进行的大量处理工作, 现在可以在更小的机器上进行。很多过去只能在小型或大型机上做的工作现在微型计算机都能完成。 The classification just described is based on physical size as opposed to storage size. A computer system user is generally more concerned with storage size because that is a more di

14、rect indication of the amount of useful work that the hardware can perform. The speed of computation is another characteristic that is important to the user. Generally speaking, users want a fast CPU and large amounts of storage, but a physically small machine for the I/O devices and main memory.cla

15、ssification,klsfken n. 1、分类, 分级 2、分类法U 3、类别系统;类别Cstoragestord n. U1. 贮藏,保管 2. 贮藏库,货栈,仓库 3. 贮藏量,库存量 4. 保管费,栈租 5. 蓄电 6. 存储,记忆characteristic,krktrstk n. C1. 特性,特征,特色2. 【数】(对数的)首数adj. 1. 特有的,独特的;典型的;表示特性的 +of译 上面所述的是按照物理尺寸的大小而不是按存储器的大小来分类的。计算机系统用户通常更关心存储器的大小, 因为这更直接地表明硬件所能完成的有效工作量。运算速度对用户来说是另一个重要特性。一般来讲

16、, 用户需要快速的CPU和大容量存储器, 而I/O设备和主存储器的体积则要小。 The CPU The part of the computer that runs the program (executes program instructions) is known as the processor or central processing unit (CPU). In a microcomputer, the CPU is on a single electronic component. Microprocessor is a processor whose elements hav

17、e been miniaturized into one or a few integrated circuits. It is a semiconductor CPU and one of the principal components of the microcomputer. The elements of the microprocessor are frequently contained on a single chip or within the same package, but are sometimes distributed over several separate

18、chips. processorpruses n. 1. 处理机；处理器；处理程 2. 加工者;制造者 3. 【电脑】信息处理器;处理程序miniaturizeminitraiz vt. 1.使小型化;使微型化integrateintigreit vt. 1. 使成一体,使结合,使合并(+with/into) 2. 使完整,使完善 3. 表示.的总和;表示.的平均值 4. 【主美】使取消(种族)隔离;使(黑人等)获得平等待遇 5. 【数】求.的积分vi. 1. 成为一体,结合在一起(+with/into) 2. 【主美】取消(种族)隔离;(黑人等)获得平等待遇 3. 【数】求积分semicon

19、ductor,semikndktn. 物 半导体译CPU 处理器或中央处理单元（CPU）是计算机中运行程序（执行程序指令）的部件。微型计算机中，CPU是一个独立的电子部件。微处理器是一种小型化处理器, 其所有元件都在一块或数块集成电路内。它是半导体中央处理器(CPU), 是微型计算机的主要部件。微处理器的元件通常安装在一个芯片上或在同一组件内, 有时也分布在几个芯片上。 The central processing unit has two componentsthe control unit and the arithmetic-logic unit. The control unit te

20、ll the rest of the computer system how to carry out a programs instructions. It directs the movement of electronic signals between memorywhich temporarily holds data, instructions, and processed informationand the arithmetic-logic unit. It also directs these control signals between the CPU and input

21、 and output devices. In a microcomputer with a micro programmed instruction set, it contains an additional control-memory unit. control unit 1. 控制单元，控制组件 2. 控制部件 , 控制器 3. 控制装置arithmetic-logic unit1. 算术逻辑单位 2. 算术逻辑部件temporarily temprerili adv. 1. 暂时地,临时地，临时性译 中央处理单元由控制逻辑部件和算术逻辑部件组成。中央处理单元控制计算机系统中的其他部

22、件执行指令。它指示存储器（暂时存储数据、指令、处理信息）和算术逻辑单元之间的信号传递。它还要控制CPU 和输入/输出设备之间的信息传递。在具有微程序控制的指令集的微型计算机中, 它包含附加的控制-存储部件。 The arithmetic-logic unit, usually called the ALU, performs two types of operationsarithmetic and logical. Arithmetic operations are, as you might expect, the fundamental math operations: addition

23、, subtraction, multiplication, and division. Logical operations consist of comparisons. That is, two pieces of data are compared to see whether one is equal to (=), less than () the other.performpf:m vt. 1. 履行;执行;完成;做 2. 演出,表演,演奏 vi. 1. 演出,表演,演奏 (+on/at) 2. (机器)运转;(人)行动,表现Q译 算术逻辑单元通常称为ALU，通常能够完成算术运算

24、和逻辑运算两种运算。算术运算和你想到的一样，就是一些基本的算术运算：加、减、乘和除。逻辑操作主要是比较。也就是，两组数据进行比较，确定它们是相等(=)、小于()的关系。 The CPU controls the computer. It fetches instructions from memory, supplying the address and control signals needed by memory to access its data. The CPU decodes the instruction and controls the execution procedure

25、. It performs some operations internally, and supplies the address, data, and control signals needed by memory and I/O devices to execute the instruction. Nothing happens in the computer unless the CPU causes it to happen. accesskses vt. 1. 【电脑】取出(资料);使用;接近 n. 1. 接近,进入;接近的机会,进入的权利;使用U (+to) access b

26、roadcasting 向公众开放的节目播送2. 通道,入口,门路CU (+to) 3. 【书】(病的)发作;(怒气等的)爆发C (+of) in an access of fury 勃然大怒 4. 【电脑】存取;取出Udecode vt. 1. 译解(密码)，解码 executionn.实行, 完成, 执行internally adv.在内, 在中心译 CPU控制整个计算机。它从存储器中取指令, 提供存储器需要的地址和控制信号。CPU对指令译码并且控制整个执行过程。它执行一些内部操作, 并且为存储器 和I/O设备执行指令提供必要的地址、数据和控制信号。除非CPU激发, 否则, 计算机什么事情

27、都不会发生。 Internally, the CPU has three sections. The register sections, as its name implies, includes a set of registers and a bus or other communication mechanism. The registers in a processors instruction set architecture are found in this section of the CPU. The system address and data buses intera

28、ct with this section of the CPU. The register section also contains other registers that are not directly accessible by the programmer. The relatively simple CPU includes registers to latch the address being accessed in memory and a temporary storage register, as well as other registers that are not

29、 a part of its instruction set architecture. register n.寄存器，记录, 登记簿, 登记, 注册architecture n.建筑, 建筑学，体系机构译 CPU内部有三大分区。寄存器区, 顾名思义, 它包括一组寄存器、一条总线或其他通信机制。微处理器指令集结构中的寄存器就属于CPU的这一分区。系统的地址和数据总线与寄存器交互。此分区还包括程序员不能直接访问的一些寄存器。相对简单CPU含有寄存器，用以锁存正在访问的存储器地址, 还有暂存器以及指令集结构中没有的其他寄存器等。 During the fetch portion of the in

30、struction cycle, the processor first outputs the address of the instruction onto the address bus. The processor has a register called the program counter; the CPU keeps the address of the next instruction to be fetched in this register. Before the CPU outputs the address onto the systems address bus

31、, it retrieves the address from the program counter register. At the end of the instruction fetch, the CPU reads the instruction code from the system data bus. It stores this value in an internal register, usually called the instruction register or something similar. cycle n.周期, 循环retrieve v.重新得到译 在

32、指令周期的取指阶段, 处理器首先将指令的地址输出到地址总线上。处理器有一个寄存器叫做程序计数器, CPU将下一条要取的指令的地址存放在程序计数器中。在CPU将地址输出到系统的地址总线之前, 必须从程序计数器中取出该地址。在指令结束前, CPU从系统时局总线上读取指令码, 它把该指令码存储在某个内部寄存器中, 该寄存器通常称作指令寄存器或其他相似的名字 The control unit also generates the signals for the system control bus, such as the READ, WRITE, and the other signals. A m

33、icroprocessor typically performs a sequence of operations to fetch, decode, and execute an instruction. By asserting these internal and external control signals in the proper sequence, the control unit causes the CPU and the rest of the computer to perform the operations needed to correctly process

34、instructions. typically adv.代表性地, 作为特色地assert v.断言, 声称sequence n.次序, 顺序, 序列译 控制单元也产生系统控制总线上的信号, 例如READ, WRATE和其他信号等。典型的一个微处理器执行取指令、译指令和执行指令等一系列的操作。通过以正确的顺序激发这些内部或外部控制信号, 控制单元使CPU和计算机的其余部分完成正确处理指令所需要的操作。 This description of the CPU is incomplete. Current processors have more complex features that imp

35、rove their performance. One such mechanism, the instruction pipeline, allows the CPU to fetch one instruction while simultaneously executing another instruction.featuren.特征, 容貌, 特色, 特写performance n.履行, 执行, 成绩, 性能, 表演 pipelinen.管道, 传递途径 译 以上对CPU的描述并不完整。现在的处理器拥有更加复杂的特征以提高其性能。这些机制中有一种是指令流水线技术, 它允许CPU在执

36、行一条指令的同时取出另 一条指令 In this section we have introduced the CPU from a system perspective, but we have not discussed its internal design. We examine the registers, data paths, and control unit, all of which act together to cause the CPU to properly fetch, decode, and execute instructions. Microsequenced

37、 CPUs have the same registers, ALUs and data paths as hardwired CPUs, but completely different control units. 本节我们从系统的角度介绍了CPU, 但我们还没有讨论它的内部设计。我们描述了CPU的寄存器、数据通路、控制单元等, 所有部件一起工作使CPU正确地读取、译码和执行指令。微程序CPU具有同硬连线CPU一样的寄存器、ALU和数据通路, 但二者控制单元完全不同。 System Buses Physically, a bus is a set of wires. The compone

38、nts of the computer are connected to the buses. To send information from one component to another, the source component outputs data onto the bus. The destination component then inputs this data from the bus. As the complexity of a computer system increases, it becomes more efficient (in terms of mi

39、nimizing connections) at using buses rather than direct connections between every pair of devices. Buses use less space on a circuit board and require less power than a large number of direct connections. They also require fewer pins on the chip or chips that comprise the CPU. The system shown in Fi

40、gure 2-1 has three buses. The uppermost bus in this figure is the address bus. When the CPU reads data or instructions from or writes data to memory, it must specify the address of the memory location it wishes to access. It outputs this address to the address bus; memory inputs, this address from t

41、he address bus and uses it to access the proper memory location. Each I/O devices, such as a keyboard, monitor, or disk drive, has a unique address as well. When accessing an I/O device, the CPU places the address of the device on the address bus. Each device can read the address off of the bus and

42、determine whether it is the device being accessed by the CPU. Unlike the other buses, the address bus always receives data from the CPU; the CPU never reads the address bus. destination n目的地，目的文件, 目的单元格 uppermostadj.至上的, 最高的, 最主要的adv.在最上, 最初, 首先specify vt.指定, 详细说明, 列入清单unique adj.唯一的, 独特的译 系统总线系统总线

43、从物理上来说, 总线就是一组导线。计算机的部件就是连在总线上的。为了将信息从一个部件传到另一个部件, 源部件先将数据输出到总线上, 然后目标部件再从总线上接受这些数据。随着计算机系统复杂性的不断增长, 使用总线比每个设备对之间直接连接要有效得多（就减少连接数量而言）。与大量的直接连接相比, 总线使用较少的电路板空间, 耗能更少, 并且在芯片或组成CPU的芯片组上需要较少的引脚。 图2-1所示的系统包括三组总线。最上面的是地址总线。当CPU从存储器读取数据或指令, 或写数据到存储器时, 它必须指明将要访问的存储器单元地址。 CPU将地址输出到地址总线上, 而存储器从地址总线上读取地址, 并且用它

44、来访问正确的存储单元。每个I/O设备, 比如键盘、显示器或者磁盘, 同样都有一个唯一的地址。当访问某个I/O设备时, CPU将此设备的地址放到地址总线上。每一个设备均从总线上读取地址并且判断自己是否就是CPU正要访问的设备。与其他总线不同, 地址总线总是从CPU上接收信息, 而CPU从不读取地址总线。 Data is transferred via the data bus. When the CPU fetches data from memory, it first outputs the memory address on its address bus. Then memory out

45、puts the data onto the data bus; the CPU can then read the data from the data bus. When writing data to memory, the CPU first outputs the address onto the address bus, then outputs the data onto the data bus. Memory then reads and stores the data at the proper location. The processes for reading dat

46、a from and writing data to the I/O devices are similar. The control bus is different from the other two buses. The address bus consists of n lines, which combine to transmit one n-bit address value. Similarly, the lines of the data bus work together to transmit a single multi-bit value. In contrast,

47、 the control bus is a collection of individual control signals. These signals indicate whether data is to be read into or written out of the CPU, whether the CPU is accessing memory or an I/O device, and whether the I/O device or memory is ready to transfer data. Although this bus is shown as bidire

48、ctional in Figure 2-1, it is really a collection of (mostly) unidirectional signals. Most of these signals are output from the CPU to the memory and I/O subsystems, although a few are output by these subsystems to the CPU. A system may have a hierarchy of buses. For example, it may use its address,

49、data, and control buses to access memory, and an I/O controller. The I/O controller, in turn, may access all I/O devices using a second bus, often called an I/O bus or a local bus.transfer vt.转移, 调转, 调任, 传递, 转让, 改变similar adj.相似的, 类似的transmit vt.传输, 转送, 传达, 传导, 发射, 遗传, 传播multi-bit 多位 bidirectional双向

50、的unidirectional 单向的Localadj.局部的译 数据是通过数据总线传送的。当CPU从存储器中取数据时, 它首先把存储器地址输出到地址总线上, 然后存储器将数据输出到数据总线上, 这样CPU就可以从数据总线上读取数据了。当CPU向存储器中写数据时, 它首先将地址输出到地址总线上, 然后把数据输出到数据总线上, 这样存储器就可以从数据总线上读取数据并将它存储到正确的单元中。对I/O设备读写数据的过程与此类似。 控制总线与以上两种总线都不相同。地址总线由n根线构成, n根线联合传送一个n位的地址值。类似地, 数据总线的各条线合起来传输一个单独的多位值。相反, 控制总线是单根控制信号

51、的集合。这些信号用来指示数据是要读入CPU还是要从CPU写出, CPU是要访问存储器还是要访问I/O设备, 是I/O设备还是存储器已就绪要传送数据等等。虽然图2-1所示的控制总线看起来是双向的, 但它实际上(主要)是单向（大多数都是）信号的集合。大多数信号是从CPU输出到 存储器与I/O子系统的, 只有少数是从这些子系统输出到CPU的。 一个系统可能具有分层次的总线。例如, 它可能使用地址、数据和控制总线来访问存储器和I/O控制器。I/O控制器可能依次使用第二级总线来访问所有的I /O设备, 第二级总线通常称为I/O总线或者局部总线。 Instruction Cycle The instruc

52、tion cycle is the procedure a microprocessor goes through to process an instruction. First the microprocessor fetches, or reads, the instruction from memory. Then it decodes the instruction, determining which instruction it has fetched. Finally, it performs the operations necessary to execute the in

53、struction. (Some people also include an additional element in the instruction cycle to store results. Here, we include that operation as part of the execute function.) Each of these functions-fetch, decode, and execute-consists of a sequence of one or more operations. Lets start where the computer s

54、tarts, with the microprocessor fetching the instruction from memory. First, the microprocessor places the address of the instruction on to the address bus. The memory subsystem inputs this address and decodes it to access the sired memory location. After the microprocessor allows sufficient time for

55、 memory to decode the address and access the requested memory location, the microprocessor asserts a READ control signal. The READ signal is a signal on the control bus, which the microprocessor asserts when it is ready to read data from memory or an I/O device. (Some processors have a different nam

56、e for this signal, but all microprocessors have a signal to perform this function.) Depending on the microprocessor, the READ signal may be active high (asserted - 1) or active low (asserted - 0). When the READ signal is asserted, the memory subsystem places the instruction code to be fetched onto t

57、he computer systems data bus, The microprocessor then inputs this data from the bus and stores it in one of its internal registers. At this point, the microprocessor has fetched the instruction. Next, the microprocessor decodes the instruction. Each instruction may require a different sequence of op

58、erations to execute the instruction. When the microprocessor decodes the instruction, it determines which instruction it is in order to select the correct sequence of operations to perform. This is done entirely within the microprocessor; it does not use the system buses. Finally, the microprocessor

59、 executes the instruction. The sequence of operations to execute the instruction varies from instruction to instruction. The execute routine may read data from memory, write data to memory, read data from or write data to an I/O device, perform only operations within the CPU, or perform some combina

60、tion of these operations. memory location存储单元sufficient adj.充分的, 足够的assert v.断言, 声称routine n. 程序,例行公事, 常规, 日常事务 译 指令周期指令周期 指令周期是微处理器完成一条指令处理的步骤。首先, 微处理器从存储器读取指令, 然后将指令译码, 辩明它取的是哪一条指令。最后, 它完成必要的操作来执行指令（有人认为在指令周期中还要包括一个附加的步骤来存储结果, 这里我们把该操作当作执行功能的一部分）。每一个功能读取、译码和执行都包括一个或多个操作。 当微处理器为存储器留出充足的时间来对地址译码和访问所

61、需的存储单元之后, 微处理器发出一个读（READ）控制信号。当微处理器准备好可以从存储器或是 I/O设备读数据时, 它就在控制总线上发一个读信号。（一些处理器对于这个信号有不同的名字, 但所有处理器都有这样的信号来执行这个功能。）根据微处理器的不同, 读信号可能是高电平有效（信号=1）, 也可能是低电平有效（信号=0）。 读信号发出后, 存储器子系统就把要取的指令码放到计算机的数据总线上, 微处理器就从数据总线上输入该数据并且将它存储在其内部的某个寄存器中。至此, 微处理器已经取得了指令。 接下来, 微处理器对这条指令译码。每一条指令可能要有不同的操作序列来执行。当微处理器对该指令译码是, 它

62、确定处理的是哪一条指令以便选择正确的操作序列去执行。这一步完全在微处理器内完成, 不需要使用系统总线。 最后, 微处理器执行该指令。指令不同, 执行的操作序列也不同。执行过程可以是从存储器读取数据, 写数据到存储器, 读或写数据到I/O设备, 执行CPU内部 操作或者执行多个上述操作的组合。 微处理器从存储器读取数据所执行的操作序列, 同从存储器中去一条指令是一样的。毕竟取指令就是简单地从存储器中读取它。图2-2(a)显示了从存储器中读取数据的操作时序。 Read Cycle To read data from memory, the microprocessor performs the s

63、ame sequence of operations it uses to fetch an instruction from memory. After all, fetching an instruction is simply reading it from memory. Figure 2-2(a) shows the timing of the operations to read data from memory. In Figure 2-2（a）, notice the top symbol, CLK. This is the computer system clock; the

64、 microprocessor uses the system clock to synchronize its operations. The microprocessor places the address onto the bus at the beginning of a clock cycle, a 0/1 sequence of the system clock. One clock cycle later, to allow time for memory to decode the address and access its data, the microprocessor

65、 asserts the READ Signal. This causes memory to place its data onto the system data bus. During this clock cycle, the microprocessor reads the data off the system bus and stores it in one of its registers. At the end of the clock cycle it removes the address from the address bus and cancel the READ

66、signal. Memory then removes the data from the data bus, completing the memory read operation. Fig.2-2(a) Read CycleFig.2-2(b) Write Cycle Write Cycle The timing of the memory WRITE operation is shown in Figure 2-2(b). The processor places the address and data onto the system buses during the first c

67、lock cycle. The microprocessor then asserts a WRITE control signal (or its equivalent) at the start of the second clock cycle. Just as the READ signal causes memory to read data, the WRITE signal triggers memory to store data. Some time during this cycle, memory writes the data on the data bus to th

68、e memory location whose address is on the address bus. At the end of this cycle, the processor completes the memory write operation by removing the address and data from the system buses and canceling the WRITE signal. symbol n.符号, 记号, 象征synchronize v.同步trigger vt.引发, 引起, 触发译读周期读周期在图2-2(a)中, 注意最上面的符

69、号CLK, 它是计算机的系统时钟, 微处理器用系统时钟使其操作同步。在一个时钟周期（系统时钟的0/1序列）的开始位置, 微处理器将地址放到总线上。一个时钟周期（允许存储器对地址译码和访问数据的时间）之后, 微处理器才发出读信号。这使得存储器将数据放到数据总线上。在这个时钟周期之内, 微处理器从系统总线上读取数据, 并存储到它的某个寄存器中。在这个时钟周期结束时, 微处理器撤消地址总线上的地址, 并撤消读信号。然后存储器从数据总线上撤消数据, 也就完成了存储器的读操作。写周期写周期存储器写操作的时序如图2-2(b)所示。在第一个时钟周期, 处理器将地址和数据放到总线上, 然后在第二个时钟周期开始

70、时发出一个写（WRITE）控制信号（或与之等价的信号）。像读信号促使存储器读取数据一样, 写信号促使存储器存储数据。在这个时钟周期的某个时刻, 存储器将数据总线上的数据写入地址总线指示的存储单元内。当这个时钟周期结束, 微处理器从系统总线上撤消地址、数据及写信号后, 就完成了存储器的写操作。ExercisesI. Fill in the blanks with the information given in the text.1Just as the CPU controls the computer (in addition to its other functions), the con

71、trol unit controls the CPU. This unit generates the internal _ that cause registers to load data, increment or clear their contents, and output their contents, as well as cause the _ to perform the correct function.2The internal working of every computer can be broken down into four parts: CPU, memo

72、ry, input and output devices. The function of the _ is to execute (process) information stored in memory. The function of _ devices such as the keyboard and video monitor is to provide a means of communicating with the CPU.3The _inside a computer carries information from place to place just as a str

73、eet bus carries people from place to place. In every computer there are three types of buses : address bus, data bus, and _. 4The CPU uses _to store information temporarily. The information could be two values to be processed, or the address of the value needed to be fetched from _.5. These studies

74、have motivated the key characteristics of _ machines：(1)a limited instruction set with a fixed format.(2)a large number of registers or the use of a compiler that optimizes register usage，and(3)an emphasis on optimizing the instruction pipeline. 1 (1) control signals (2) ALU2 (1) CPU (2) I/O3 (1) bu

75、s (2) control bus4 (1) registers(2)memory5 (1) RISCII. Translate the following passages from English into Chinese. One method of increasing the complexity of an integrated circuit is simply to scale the chip down. For example, if every line etched into the silicon die could be shrunk in half, the sa

76、me circuit could be built in one -fourth the area. The evolution of dynamic memory chips (DRAMs) follows this rule exactly. The original IBM PC used 16 KB DRAMs. These were soon replaced with 64K chips, then 256 KB chips, and now 16 MB, and even 64 MB chips. The trick, of course, is being able to im

77、prove processing skills sufficiently to allow this scaling to continue. In 1969, the minimum feature size (the smallest detail that can be etched into a chip) was 10 microns (1010-6 meter). By 1997, this had shrunk to 0.25 micron40 times smaller! The Pentium uses a superscalar architecture. This mea

78、ns that the chips capabilities go beyond those achieved simply by scaling down its size. In particular, the Pentium is the first microprocessor in the Intel family to support two instruction pipelines, each with its own arithmetic-logic unit, address generation circuitry, and data cache interface. T

79、he result is a processor that can actually execute two different instructions simultaneously. II. 增加集成电路集成度的一个方法就是缩小芯片的尺寸。例如, 若将刻蚀在硅片压模上的每条线都缩小一半, 则同一个电路所占用的面积仅为原来的 1/4。动态存储器芯片(DRAM)就是严格按这一规律在发展着。初期的IBM PC使用16KB DRAM芯片, 而且很快被64KB芯片所取代;后来采用256KB, 现在常用 16MB、甚至64MB的芯片。 当然, 其窍门仍然是不断改进生产工艺, 使尺寸继续缩小。1969年

80、最小“特征”尺寸(指可以光刻到硅片上的最小尺寸)为l0 m, 到1997年已达到0. 25 m, 缩小了40倍! 奔腾采用一种超标量体系结构。这表明这种芯片的处理能力超过了单纯减小尺寸所能得到的能力。实际上, 奔腾是英特尔系列中第一个支持两条指令流水 线的微处理器, 每条流水线都有其自己的算术逻辑部件、地址发生电路系统和数据高速缓存接口。这样, 一个处理器能同时执行两条不同的指令。Section B Memory Memory Terminology In the design of all computers, semiconductor memories are used as prima

81、ry storage for code and data. Semiconductor memories are connected directly to the CPU and they are the memory that the CPU first asks for information (code and data). For this reason, semiconductor memories are sometimes referred to as primary memory. The main requirement of primary memory is that

82、it must be fast in responding to the CPU; only semiconductor memories can do that. Among the most widely used semiconductor memories are ROM and RAM. Before we discuss different types of ROM and RAM, we discuss some important terminology common to all semiconductor memories, such as capacity, organi

83、zation, and speed. Memory capacity The number of bits that a semiconductor memories chip can store is called its chip capacity. It can be units of Kbits（kilobits）, Mbits（megabits）, and so on. This must be distinguished from the storage capacity of computers. While the memory capacity of a memory IC

84、chip is always given in bits, the memory capacity of a computer is given in bytes. For example, an article in a technical journal may state that the 16M chip has become popular. In that case, although it is not mentioned that 16M means 16megabits, it is understood since the article is referring to a

85、n IC memory chip. However, if an advertisement state that a computer comes with 16M memory, since it is referring to a computer it is understood that 16M means 16megabytes.terminologyn.术语学semiconductorn.物 半导体primary storage 主存ROM 只读存储器RAM 随机读写存储器bit n.位, 比特chip n.芯片capacityn.容量, 生产量, 容量, 智能, 才能, 能力,

86、 接受力, 地位kilobits n.千字节，1024字节megabitsn.百万位, 兆位IC 集成电路,指令计数器popular adj.通俗的, 流行的, 受欢迎的译存储器术语存储器术语在计算机设计中，半导体存储器被用做主存，用来存储代码和数据。半导体存储器直接与CPU相连，CPU首先从存储器中获取信息（代码和数据）。因此，半导体存储器有时指的就是主存。主存必须快速地对CPU做出反应，只有半导体存储器才能够作到这种快速反应。广泛使用半导体存储器的是RAM和ROM。在讨论不同种类的RAM和ROM之前，我们先来讨论一下有关半导体存储器的一些重要术语，比如，存储容量、组织和速度。存储容量存储容

87、量半导体存储器芯片能够存储的数位的数量称为芯片的容量，它的单位可以是K位（千位）或M位（兆位）等等，这些必须与计算机的辅助存储器加以区别。存储器的容量通常以字节为单位，而存储器IC（集成电路）芯片的存储以位为存储单位。例如，某科技期刊的一篇文章中提到16M芯片使用的非常普遍，这种情况下，虽然没有提到16M意味着16M位，但这是显而易见的，因为文章中指的是IC芯片的存储容量。而如果一个广告中提到一台计算机具有16M的存储器，因为指的是计算机的存储器容量，所以16M意味着16M字节。 Memory Organization Memory chips are organized into a num

88、ber of locations within the IC. Each location can hold 1 bit,4 bits,8 bits, or 16 bits, depending on how it is designed internally. The number of bits that each location within the memory chip can hold is always equal to the number of data pins on the chip. How many locations exist inside a memory c

89、hip? That depends on the number of address pins. The number of locations within a memory IC always equals 2 to the power of the number of address pins. Therefore, the total number of bits that a memory chip can store is equal to the number of locations times the number of data bits per location. To

90、summarize: 1.Each memory chip contains 2xlocations,where x is the number of address pins on the chip. 2.Each location contains y bits, where y is the number of data pins on the chip. 3.The entire chip will contain 2xy bits, where x is the number of address pins and y is the number of data pins on th

91、e chip. Table 2-1 serves as a reference for the calculation of memory organization. Speed One of the most important characteristics of a memory chip is the speed at which data can be accessed from it. To access the data, the address is presented to the address pins, and after a certain amount of tim

92、e has elapsed, the data shows up at the data pins. The shorter this elapsed time, the better, and consequently, the more expensive the memory chip. The speed of the memory chip is commonly referred to as its access time. The access time of memory chips varies from nanoseconds to hundreds of nanoseco

93、nds, depending on the IC technology used in the design and fabrication. The three important memory characteristics of capacity, organization, and access time will be used extensively. ROM and RAMROM is the type of memory that does not lose its contents when the power is turned off. For this reason,

94、ROM is also called nonvolatile memory. There are different types of read-only memory, such as PROM, EPROM, EEPROM, and flash EPROM. Random Access Memory (RAM), also called read/write memory, can be used to store data that changes. RAM memory is called volatile memory since cutting off the power to t

95、he IC will mean the loss of data. There are three types of RAM: static RAM (SRAM), dynamic RAM(DRAM),and NV-RAM(nonvolatile RAM). Many computer systems, including personal computers, include both ROM and RAM. summarizev.概述, 总结, 摘要而言nanosecond n.十亿分之一秒fabricationn.制作, 构成, 伪造物, 装配工nonvolatile adj.非易失性

96、的volatile adj. 易失性的， 挥发性的, 可变的, 不稳定的译存储器的组成存储器的组成在IC存储器芯片中，要构成一定数量的单元，根据芯片内部的设计，每个单元能够存储1位、4位、8位甚至16位数位。存储器芯片内每个单元存储的位数与芯片的数据引脚的数量相同。在存储器芯片中有多少个单元呢？存储器芯片中单元的数量与地址引脚的数量相关。存储器芯片中单元的数量等于2的地址引脚的数量次方个。因此，存储器芯片能够存储的位数为单元数与每个单元中能够存储的数据位数的乘积。总结如下：1.每个存储器芯片具有2x个单元，x是芯片地址引脚的数量。2.每个单元存储y位，y是芯片数据引脚的数量。3.每个芯片将存储

97、2xy位，x是芯片地址引脚的数量，y是芯片数据引脚的数量。表2-1是存储器组成的相关计算。速度速度存储器芯片的一个非常重要的特征参数就是数据的存取速度。为了存取数据，首先将地址信息传送到地址引脚上，一段时间以后，要存取的数据就会出现在数据引脚上。使用的时间越短，效果越好，存储芯片的价格也越高。存储器芯片的存取速度通常是指它的存取时间。根据在设计和制作过程中的IC的技术情况的不同，存储器芯片的存取时间分布从几纳秒到几百纳秒。存储器的三个重要特性容量、组成和存取时间，具有广泛的应用。ROM 与与 RAMROM是这样一种存储器,当电源关闭时ROM内的信息不会丢失。因此ROM又被称为非易失性存储器。只

98、读存储器又可以分为许多种，例如，PROM, EPROM, EEPROM和闪速EPROM。随机访问存储器也称为读写存储器, 用来存储可以改变的数据。因为断电后IC芯片中的信息丢失，所以RAM又称为易失性存储器。RAM分为三类：静态RAM（SRAM）、动态RAM（DRAM）和NV-RAM(非易失性RAM)。许多计算机系统, 包括个人电脑, 都同时拥有ROM和RAM。 Internal Chip OrganizationThe internal organizations of ROM and RAM chips are similar. To illustrate the simplest org

99、anization, a linear organization, consider an 164 ROM chip. For simplicity, programming components are not shown. This chip has three address inputs and two data outputs, and 16 bits of internal storage arranged as eight 2-bit locations.The three address bits are decoded to select one of the eight l

100、ocations, but only if the chip enable is active. If CE=0, the decoder is disabled and no location is selected. The tri-state buffers for that locations cells are enabled, allowing data to pass to the output buffers. If both CE and OE set to 1, these buffers are enabled and the data is output from th

101、e chip; otherwise the outputs are tri-stated. As the number of locations increases, the size of the address decoder needed in a linear organization becomes prohibitively large. To remedy this problem, the memory chip can be designed using multiple dimensions of decoding. In larger memory chips, this

102、 savings can be significant. Consider a 40961 chip. The linear organization will require a 12 to 4096 decoder, the size of which is proportional to the number of outputs. (The size of an n to 2n decoder is thus said to be O (2n).) If the chip is organized as a 6464 two dimensional arrays instead, it

103、 will have two 6 to 64 decoders: one to select one of the 64 rows and the other to select one of the 64 cells within the row. The size of the decoders is proportional to 264, or O (22n /2) = O (2n /2 +1). For this chip, the two decoders together are about 3 percent of the size of the one larger deco

104、der. Memory Subsystem ConfigurationIt is very easy to set up a memory system that consists of a single chip. We simply connect the address, data, and control signals from their system buses and the job is done. However, most memory systems require more than one chip. Following are some methods for c

105、ombining memory chips to form a memory subsystem.Two or more chips can be combined to create memory with more bits per location. This is done by connecting the corresponding address and control signals of the chips, and connecting their data pins to different bits of the data bus. For example, two 1

106、k4 chips(2114) can be combined to create an 1k8 memory, as shown in Figure 2-3. The chips receive the same ten address inputs from the bus, as well as the same CS and WR signals. The data pin of the first chip is connected to D0 D3 and another is connected to D4 D7 of the data bus. When the CPU read

107、s data, it places the address on the address bus. Two chips read in address bits A0, A1, and A9 and perform their internal decoding. If the CS and WR signals are activated, the chips input the data from data bus. Since the address and enable signals are the same for eight chips, either all chips or

108、neither chip is active at any given time. The computer never has only one of the two active. For this reason, they act just as a single1k8 chip, at least as far as the CPU is concerned. Instead of creating wider words, chips can be combined to create more words. The same two1k8 chips could instead b

109、e configured as a 2k8 memory subsystem. illustratevt.举例说明, 图解, 加插图于, 阐明 vi.举例tri-state 三态celln.单元, 细胞prohibitivelyadv.禁止地, 抑制地remedyvt. 修补,治疗, 补救, 矫正, 修缮 correspondingadj.相应的, 通讯的芯片的内部组成芯片的内部组成ROM和RAM芯片的内部组成是相似的。为了说明一个最简单的组成线性组成, 我们来考虑一个164的ROM芯片。为了简化, 编成器件没有画出来。这个芯片有三个地址输入端和两个数据输出端, 以及64位的内部存储元件, 它

110、排列成16个单元, 每个单元4位。三个地址位经过译码, 可以选择8个中的一个, 但只有芯片的使能端要有效才行。如果CE=0, 译码器被禁止, 则不选择任何单元。该单元上的三态缓冲器是有效的, 允许数据输出到缓冲器中。如果CE=1且OE=1, 则这些缓冲器有效, 数据从芯片中输出；否则, 输出是高阻态。随着单元数量的增加, 线性组成中地址译码器的规模变得相当大。为了补救这一问题, 存储器芯片可以设计成使用多维译码方式。在大型存储器芯片中, 这种节省显得至关重要。考虑一个40961芯片, 其线性组成将需要一个124096译码器, 译码器大小与输出的数量成正比（假定 一个n2n译码器的大小是O(2n

111、)）。如果芯片排列成6464的二维数组, 它将有两个664译码器：一个用来选择64行中的一行, 另一个用来在选定行中选择64个单元中的一个单元, 该译码器的大小正比于264, 或写成O (22n /2) = O(2n /2 +1)。对于这个芯片, 两个译码器总的大小约是那个大译码器大小的3%。存储器子系统的构成存储器子系统的构成构造包含一个简单芯片的存储器是非常容易的, 我们只需要简单地从系统总线上连接地址信号线、数据信号线和控制信号线就完成了。然而。大多数的存储器系统需要多个芯片, 下面是通过存储器芯片组合来形成存储器子系统的一些方法。两个或多个芯片可以组合起来构造一个每单元有多位的存储器。

112、这可以通过连接芯片相应的地址信号线和控制信号线, 并将它们的数据引脚连到数据总线的不同位上来完成。例如,2个1k4芯片(2114芯片)可以组合产生一个1k8存储器, 如图2-3所示。两个芯片从总线上接收相同的十位地址输入, 所有芯片有共同的CS和WR信号。第一个芯片的数据引脚连接到数据总线D0到D3 ,另一个芯片的数据引脚连接到数据总线D4 到 D7。当CPU读取数据时, 它将地址放在地址总线上。两个芯片读取地址位A2、A1到A0, 并执行内部译码操作。如果CS和WR信号是有效的, 两个芯片则输出数据到数据总线的八位上。因为两个芯片的CS和WR信号是相同的, 因此在任一时刻所有芯片要么同时有效

113、, 要么同时无效。正因如此, 它们的行为就像一个单一的1k8芯片, 至少就CPU而言是这样的。除了构造更宽的字以外, 芯片组合还可以构造出更多的字。两样的两个1k8芯片能够组成一个2k8存储子系统。译译Beyond the BasicsThe memory subsystem described in this chapter is sufficient for small, embedded computers. Personal computers and mainframes, however, require more complex hierarchical configuratio

114、ns. These computers include small, high-speed cache memory. The computer loads data from the physical memory into the cache; the processor can access data in the cache more quickly than it can access the same data in physical memory. Many microprocessors include some cache memory right on the proces

115、sor chip. A computer that includes cache memory must also have a cache controller to move data between the cache and physical memory. At the other extreme, modern computers include virtual memory. This mechanism uses a hard disk as a part of the computers memory, expending the memory space of the co

116、mputer while minimizing cost, since a byte of hard disk costs less than a byte of RAM. As with the cache, virtual memory needs a controller to move data between physical memory and the hard disk. hierarchicaladj.分等级的cache n.高速缓冲存储器virtual memory虚拟存储器译基本功能的拓展基本功能的拓展本章描述的存储器子系统对于较小的、嵌入式计算机而言是足够的。然而, 个

117、人电脑和大型主机, 需要更加复杂的层次结构。这些计算机包含体积小的、高速的高速缓冲存储器。计算机将数据从物理存储器中装载到高速缓冲中：处理器在高速缓冲中访问数据比在物理存储器中快得多。许多微处理器就在处理器芯片中含有一些高速缓冲存储器。含有高速缓冲存储器的计算机同时也要有一个高速缓冲控制器,用来在高速缓冲和物理存储器间传输数据。在另一端, 现代计算机还具有一个虚拟存储器。这种机制用硬盘充当计算机存储器的一部分, 扩大了计算机的存储空间, 而且降低了价格, 因为一个硬盘字节的价格 比一个RAM字节要便宜的多。同高速缓冲一样, 虚拟存储器也需要一个控制器以便在物理存储器和虚拟存储器之间传输数据。

118、ExercisesI. Fill in the blanks with the information given in the text.1.There are two well-known types of memory chips. One types is called _. The other is _.2. ROM is the type of memory that does not lose its contents when the power is turned off. For this reason, ROM is also called nonvolatile mem

119、ory. There are different types of read-only memory. _ refers to the kind of ROM that the user can burn information into. In _, one can program the memory chip and erase it thousands of times.3. Storage cells in_ memory are made of flip-flops and therefore do not require refreshing in order to keep t

120、heir data. The other kind of RAM is_,the major advantages of which are high density (capacity), cheaper cost per bit, and lower power consumption per bit.4. In the design of all computers, _ are used as primary storage for code and _. They are the memory that the CPU first asks for information. I. 1

121、 (1) RAM (2) ROM 2 (1) PROM (2) EPROM O3 (1) SRAM (2) DRAM 4 (1) semiconductor memories (2) dataII. Translate the following passages from English into Chinese. RAM is the internal and temporary storage of data and programs in the computers memory. Once the power is turned off or interrupted, everyth

122、ing in internal storage disappears. Such storage is therefore said to be volatile. Thus, we need external, more permanent, or nonvolatile, ways of storing data and programs. We also need external storage because users need much more capacity than is possessed by a computers primary memory. The most

123、widely used external storage media are floppy disks, hard disks, optical disks, and magnetic tape. It is important for users to understand the advantages, disadvantages, and typical users for each. Any particular microcomputer could use all of the different media. However, a typical system has a har

124、d-disk drive and one or two other drivers. The hard-disk drive is designated as the C driver and is typically used for storing system and application programs. II. 计算机存储器中, RAM是内存,并且是程序和数据的暂时存储器。一旦电源关闭或中断,内存的所有信息都会丢失，这种存储器被称为易失性存储器。因此，我们需要外部的、更持久的或非易失性存储器来存储程序和数据。实际应用中，用户需要比现有计算机内存容量大的存储器，所以我们还需要外存。

125、 外存普遍采用的存储介质有：软盘、硬盘、光盘和磁带。用户明确每种存储介质的优点、缺点和它们的使用方法非常重要。任何计算机都可以使用所有不同的存储介质。然而，一个典型的系统必须有一个硬盘驱动器和一个或两个其他驱动器。硬盘驱动器通常被设定为C盘驱动器，主要于存储系统程序和应用程序。 . Translate the following terms or phrases from English into Chinese and vice versa.1. decode 2. ROM(Read Only Memory) 3. capacity 4. cache 5. buffer 6. 半导体存储器

126、7. 非易失性存储器8尺度, 维(数) 9. 随机存取存贮器10虚拟存储器III.1. 译码 2. 只读存储器3. 容量 4. 高速缓冲5. 缓冲器6. semiconductor memories 7. nonvolatile memory 8dimension 9. RAM(Random Access Memory) 10virtual memory Section C I/O Subsystem Organization and Interfacing Input devices take data and programs people can read or understand a

127、nd convert them to a form the computer can process. This form consists of the machine-readable electronic signals of 0s and 1s. On the contrary output devices convert machine-readable information into people-readable form. Next we will introduce the I/O subsystem organization and interfacing. The CP

128、U treats memory as homogeneous. From the CPUs perspective, each location is read from and written to in exactly the same way. Each memory location performs the same function-it stores a data value or an instruction for use by the CPU. Input/output (I/O) devices, on the other hand, are very different

129、. A personal computers keyboard and hard disk perform vastly different functions, yet both are part of the I/O subsystem. Fortunately for the system designer, the interfaces between the CPU and the I/O devices are very similar. Each I/O device is connected to the computer systems address, data, and

130、control buses. Each I/O device includes I/O interface circuitry; it is actually this circuitry that interacts with the buses. The circuitry also interacts with the actual I/O device to transfer data. As for the generic interface circuitry for an input device， the data from the input device goes to t

131、he tri-state buffers. When the values on the address and control buses are correct, the buffers are enabled and data passes on to the data bus. The CPU can then read in this data. When the conditions are not right, the logic block does not enable the buffers; they are tri-stated and do not place dat

132、a onto the bus. subsystem n.次要系统, 子系统interfacing n.界面连接, 接口连接, 连接衬布, 衬头homogeneous adj.同类的, 相似的, 均一的, 均匀的keyboard n. 键盘译Section C I/O 子系统的组成和接口子系统的组成和接口输入设备获取人们能够读懂或理解的数据，并转换成计算机能够处理的形式，该形式为由多个0和1 组成的计算机能够识别的电子信号。相反，输出设备主要是将机器能够识别的信息转换成人能够识别的信息形式。接下来我们将介绍输入/输出子系统的组成和接口。CPU把存储器看作是同构的。从CPU的角度来看, 每一个单元

133、的读操作和写操作都是一样的, 每一个单元执行同样的功能, 即存储CPU使用的数据或指令。另一方面, 输入/输出设备是很不一样的。个人电脑的键盘和硬盘执行的是千差万别的功能, 但它们同是I/O子系统的一部分。对系统设计者而言, 幸运的是CPU和各I/O设备之间的接口是非常相似的。每一个I/O设备与计算机系统的地址总线、数据总线和控制总线相连接, 它们都包括I/O接口电路, 与总线交互的实际上正是这一电路, 同时，它与实际的I/O设备交互来传输数据。 对于一个输入设备的一般接口电路，从输入设备来的数据传送到三态缓冲器, 当地址总线和控制总线上的值正确时, 缓冲器设为有效, 数据传到数据总线上, 然

134、后CPU可以读取数据。当条件不正确时, 逻辑块不会使缓冲器有效, 它们保持高阻态, 而且不把数据传到总线上。 The key to this design is the enable logic. Just as every memory location has a unique address, each I/O device also has a unique address. The enable logic must not enable the buffers unless it receives the correct address from the address bus.

135、It must also get the correct control signals from the control bus. For an input device, an RD (or RD) signal must be asserted (as well as the IO/signal, or equivalent, in systems with isolated I/O). The design of the interface circuitry for an output device, such as a computer monitor, is somewhat d

136、ifferent than that for the input device. Tri-state buffers are replaced by the register. The tri-state buffers are used in input device interfaces to make sure that no more than one device writes data to the bus at any time. Since the output devices read data from the bus, rather that write data to

137、it, they dont need the buffers. The data can be made available to all output devices; only the device with the correct address will read it in The load logic plays the role of the enable logic in the input device interface. When this logic receives the correct address and control signals, it asserts

138、 the LD signal of the register, causing it to read data from the systems data bus. The output device can then read the data from the register at its leisure while the CPU performs other tasks. . 译 这一设计的关键在于使能逻辑。正如每一个存储单元都有一个唯一的地址一样, 每一个I/O设备也有一个唯一的地址。除非从地址总线得到了正确的地址, 否则使能逻辑不置缓冲器有效。同时, 它还必须从控制总线上得到正确

139、的控制信号。对于一个输入设备, RD(或者RD)信号必须有效（在独立系统中, 还有信号, 或其他等效的信号）。 输出设备（如显示器）接口电路的设计与输入设备的设计有所不同。寄存器代替了三态缓冲器。输入设备中使用三态缓冲器是为了确保在任何时刻都只有一个设备向总线写数据, 而输出设备是从总线读取数据, 不是写数据, 因此不需要缓冲器。数据对于所有的输出设备都可获得, 但只有具有正确地址的设备才 会读取它。 装载逻辑发挥着输入设备接口中使能逻辑的作用。当此逻辑获得正确的地址信号和控制信号后, 它发出寄存器的LD信号, 促使它从系统数据总线上读取数据。然后输出设备可以在其空闲的时候从寄存器中读取该数据

140、, 同时CPU可以执行其他的任务。 A variant of this design replaces the register with tri-state buffers. The same logic used to load the register is used to enable the tri-state buffers instead. Although this can work for some designs, the output device must read in data while the buffers are enabled. Once they are

141、 disabled, the outputs of the buffers are tri-stated and the data is no longer available to the output device. Some devices are used for both input and output. A personal computers hard disk drive falls into this category. Such a device requires a combined interface that is essentially two interface

142、s, one for input and the other for output. Some logic elements, such as the gates that check the address on the address bus, can be used to generate both the buffer enable and register load signals. I/O devices are much slower than CPUs and memory. For this reason, they can have timing problems when

143、 interacting with the CPU. To illustrate this, consider what happens when a CPU wants to read data from a disk. It may take the disk drive several milliseconds to position its heads properly to read the desired value. In this time, the CPU could have read in invalid data and fetched, decoded, and ex

144、ecuted thousands of instructions. Most CPUs have a control input signal called READY (or something similar). Normally this input is high. When the CPU outputs the address of the I/O device and the correct control signals, enabling the tri-state buffers of the I/O device interface, the I/O device set

145、s READY low. The CPU reads this signal and continues to output the same address and control signals, which cause the buffers to remain enabled. In the hard disk drive example, the drive rotates the disk and positions its read heads until it reads the desired data. variantn.变量category n.种类, 别millisec

146、ondn.毫秒position vt.安置, 决定.的位置rotate v.(使)旋转 该设计也可以用三态缓冲器代替寄存器。装载寄存器的逻辑同样用于使能三态缓冲器。虽然对于某些设计这是可行的, 但是输出设备必须在缓冲器有效时读入数据。一旦缓冲器被禁止, 其输出就是三态, 该数据也就不再能够供输出设备使用。 有些设备既用于输入又用于输出, 个人电脑中的硬盘驱动器就属于这一类。这样的设备需要一个组合接口, 本质上是两个接口, 一个用于输入, 另一个用于输出。一些逻辑元件（比如检查地址总线上的地址是否正确的门电路）既可以用来产生缓冲器的使能信号, 有可以用来产生寄存器的装载信号。 I/O设备比CPU

147、和存储器慢得多。基于这个原因, 当它们与CPU交互时, 就可能存在时序上的问题。为了说明这一点, 考虑当CPU想要从硬盘中读取数据时 会发生的情况, 这可能要消耗磁盘驱动器几个毫秒来正确的定位磁头, 以便读取想要的数值, 而在这段时间里, CPU可能已经读入了不正确的数据, 并且读取、译解和执行了成千上万条指令。 大多数CPU都有一个控制输入信号, 叫做就绪信号（READY）（或其他意思相近的名称）, 通常它为高电平。当CPU输出某I/O设备的地址和正确的控制 信号, 促使I/O设备接口的三态缓冲器有效时, 该I/O设备置READY信号为低电平。CPU读取这一信号, 并且继续输出同样的地址信号

148、和控制信号, 使缓冲器保持有效。在硬盘驱动器的例子中, 此时驱动器旋转磁头, 并且定位读写头, 直到读到想要要的数据为止。 The CPU then reads the data from the bus and continues its normal operation. The extra clock cycles generated by having READY set low are called wait states. CPUs can also use the READY signal to synchronize data transfers with the memory

149、 subsystem. These I/O interfaces are fine for small computers, such as the microwave oven controller, but they suffer from poor performance in larger computer systems. In all but the smallest systems, it is not acceptable for the CPU to have to wait thousands of clock cycles for data from an I/O dev

150、ice. Many systems use interrupts so they can perform useful work while waiting for the much slower I/O devices. These I/O interfaces are also not suited to large data transfers. In the systems in this chapter, each byte of data transferred between an I/O device and memory must pass through the CPU.

151、This is inefficient for many common operations, such as loading a program from disk into memory. Direct memory access, DMA, is a method used to bypass the CPU in these transfers, thus performing them much more quickly. interrupt vt.中断inefficient adj.效率低的, 效率差的, (指人)不能胜任的, 无能的 译 然后它通过缓冲器将数据输出到数据总线上,

152、并重新设置READY为高电平。这时CPU才从总线上读入数据, 之后继续它的正确操作。设置READY为低电平 而生成的附加时钟周期叫做等待状态。CPU同样也可以使用READY信号来同步与存储器子系统之间的数据传输。 这些I/O接口对于小型的计算机而言已经很好了, 比如说微波炉控制器, 但是在大型的计算机系统中它们的性能则很差。在除最小系统以外的所有系统中, 让CPU等待成千上万个时钟周期方从I/O设备中得到数据是不能接收的, 为此, 许多系统都使用了中断机制, 以便CPU在等待慢得多的I/O设备时, 可以执行其他有用的工作。 这些I/O接口也不适合大量的数据传输。在本章的系统中, I/O设备和存

153、储器之间传输的每一个字节都必须通过CPU, 这对于许多常见的操作（例如从磁盘向主机存装载一个程序）来说效率低下。直接存储器访问就是在数据传输中绕过CPU的一种方法, 因此执行起来速度很快 ExercisesI. Fill in the blanks with the information given in the text.1. Each I/O devices, such as input devices _, _ ，or disk drive, has a unique address as well. When accessing an I/O device, the CPU plac

154、es the address of the device on the address bus. Each device can read the address off of the bus and determine whether it is the device being accessed by the CPU. 2. Each I/O device is connected to the computer systems _, data, and control buses. Each I/O device includes I/O _ circuitry that interac

155、ts with the buses.3. The key to this design is the enable logic. Just as every memory location has a unique address, each I/O device also has a _ address. The enable logic must not enable the buffers unless it receives the correct address from the address bus.4. For a I/O devices to be recognized by

156、 the CPU, it must be assigned an address. No two devices are allowed to have the _ address. The CPU puts the address on the address bus, and the decoding circuitry finds the device. Then the CPU uses the _either to get data from that device or to sent data to it.I. 1 (1) Keyboard (2) mouse 2 (1) add

157、ress (2) interface3 (1) unique 4 (1) same data (2) bus II. Translate the following passages from English into Chinese. The term I/O is used to describe any program, operation or device that transfers data to or from a computer and to or from a peripheral device. Every transfer is an output from one

158、device and an input into another. Devices such as the keyboard and the mouse are input-only devices while devices such as printers are output-only. A writable CD-ROM is both an input and an output device. A computer device, such as a printer is not part of the essential computer, i.e., the memory an

159、d microprocessor. Peripheral devices can be external - such as a mouse, keyboard, printer, monitor, external Zip driver or scanner - or internal, such as a CD-ROM driver, CD-R driver, or internal modem. Internal peripheral devices are often referred to as integrated peripherals. II. I/O主要用于描述从一台计算机或

160、一台外部设备传送数据的任何一段程序、操作或设备，或者向一台计算机或一台外部设备传送数据的任何一段程序、操作或设备。每一个传送都是从一种设备的输出和对另一个设备的输入。键盘和鼠标仅仅是输入设备，而打印机仅仅是输出设备。可写光盘即是输入设备也是输出设备。存储器和微处理器是计算机的基本组成部件，而打印机等计算机设备却不是计算机的基本组成部件。外部设备可以存在于计算机的外部，比如鼠标、键盘、打印机、监视器、外部大容量软盘驱动器或扫描仪，也可以存在于计算机内部，比如光盘驱动器、可刻录光盘驱动器，或内置调制解调器。内置的外围设备集成外设。 Grammar科技英语用句的特点科技英语用句的特点 科技英语与文学

161、英语的不同在于很少使用诸如夸张、比喻、拟人、对仗、反语、幽默等文学修饰手法。这些是因为科技英语采用的是正式书面文体，在著述时来不得半点虚假，并且不能带有个人丝毫的感情色彩。因此，在用句上常常选用以下几个方面的语句： 1多用陈述句，第一时态动词为现在时 语气表达语言的功能，包括陈述、提问、提供和命令。 例如： These added（分词） quantities of inert gas have （现在时）an important characteristic. Their isotopes, which are elements having （现在时）the same atomic num

162、ber but different atomic weights, is 现在时）characteristic of the process that produces then. For example, helium that originates （现在时）as alpha particles consists （现在时）only of the isotope helium 4. Argon from the radioactive decay of potassium exists （现在时）only as the isotope argon 40, and xenon from sp

163、ontaneous fission consists （现在时）primarily of xenon 134 and xenon 136. Because inert gases occur （现在时）in such small quantities in the earth, adding（分词） even a little inert gas to terrestrial material represents（现在时） a significant increase in the total. Xenon129 is produced（被动式） by radioactive decays

164、（现在时）into the xenon 129. Iodine 129 has（现在时） a very short half-life. A half-life is the length of time it takes （现在时）for one-half of a radioactive element to decay（不定式）. The fact that there is （现在时）excess xenon 129 in the earth today indicates （现在时）that iodine129 was present in the earth when it was

165、 formed（被动式）. It also indicates （现在时）that some of the xenon129 into which the iodine 129 decayed has been trapped（被动式）within rocks in the earth throughout its history. 上述三段有九句，文字全部为陈述句，其中现在时为15个。 科技英语中陈述句所占比例几乎为98%，这是因为科技英语的显著特点是重叙事逻辑上的连贯及表达上明晰与畅达。现在时表达的是“无时间性”的“一般叙述”，即通常发生或并无时限的自然现象、过程、常规。科技英语中用一般现

166、在时表达科学定义、定理、方程式或公式的解说以及图表的说明，目的在于给人以精确无误的“无时间性”以及排除任何与时间牵连的误解，使行文更生动。 2常用被动句 科技英语中多使用动词被动式，被动式是科技文章中广为流传甚至是必用的语态。这是因为： 1）被动语态结构与主动语态结构相比，更少主观色彩，更富于客观性，这很适合描述客观事物。 例如： The serial number and model number for both the keyboard and display module is located on the bottom outside cover of each component.

167、 键盘及显示器的序号及型号位于每一个部件的底部外壳上。 2）在被动语态句中，被说明的对象被置于主语的地位上，处于整个句子的前部，所以更能引起人们的注意。 例如： Each terminal is packaged in an individual carton for protection during shipment. 每台终端装运时均包装在单个的防护纸箱里。 3）被动语态句比主动语态句的结构更显简洁。 例如： The keys of the keyboard can be divided into three functional groups. 键盘的键可以划分为三个功能组。 3复合句

168、占绝大多数 在科技英语文章中，复合句出现较多，有时一个复合长句就是一段。这是因为人们在描述各种现象和阐述其规律时，需要严密的逻辑思维和精确的条件表达。复合句不仅长而且关系复杂，头绪纷繁。有时数个从句说明一个主句；有时从句中又带有从句；有时从句是并列句。这些显然与科技英语重视叙事的逻辑性、层次感和转折对比以及推出前提、列出条件、导出结论等论证手段很有关系。这些反映到语言的形式上，必定出现长的复合句。 例如： Applets can be activated automatically when a user views a Web page, or they may require some a

169、ction on the part of the user, such as clicking on an icon in the Web page. 当用户浏览网页时，Java 小应用程序可被自动激活；或者，此列程序要求部分用户做某些动作，例如用户点击网页上的某个图表后才能被激活。 本句是一个并列句，有并列连词or 连接。在or 前面的第一个句子是一个复合句，when 前面是主句，其后是时间状语从句（也可以看作是条件状语从句）。 Object-oriented programming is a programming paradigm in which a program is viewed

170、 as a collection of discrete objects that are self-contained collections of data structures and routines that interact with other objects. 面向对象的编程是这样一种编程规范，其中程序被看作是离散对象的集合，这些离散对象是数据结构及与其他对象交互作用的例行程序的自包含的集合。 本句是复合句，句子较长，结构也比较复杂，从句中套有从句。In which 前是主句，其后是定语从句，修饰paradigm。在定语从句中还包含一个定语从句that are self-con

171、tained routines，修饰discrete objects。在该定语从句中又包含另一个定语从句that interact with other objects，修饰routines。 4广泛使用非限制性动词 一般来说，科技英语句子较长，但句型变化很少，关系代词that 和which 以及非人称代词it 的使用频率较高，同时为了简练、紧凑的说理，在科技英语文章中常使用结构简单的动词不定式、动名词和分词这些非谓语结构来表达各种从句或分句。 例如： When a program is finished, a new one can take its place in memory, all

172、owing the computer to process completely different data. 当一个程序结束时，一个新程序可以在内存中取得其位置，这就可以准许计算机处理完全不同的数据。 本句中的allowing 是分词短语，to process 是动词不定式短语。 5常用虚拟语气 在科技英语中对许多客观事物的内容和现象的论证及探讨的结果，作者时常会涉及到各种限制条件，为了不把话说绝，留有一定的回旋余地，因此在不少场合下使用虚拟语气。另外，作者在阐明他们对各种现象和问题的看法时，为了使口气委婉，或为了表示某种推测，也往往采用虚拟语气。还有，在条件句中，特别是在与事实不符的条件

173、句中，也需使用虚拟语气。 例如： One board might hold the processor, another might hold main memory，while a third one might contain the electronics to link a particular input or output device to the system 一个电路板可能放置处理器，另一个电路板可能放置主存储器，而第三个电路板则可能包含用来将特定的输入或输出设备连接到系统去的电子线路（might表示一种推测的可能性，可能可以也可能不可以）。 6采用习惯性句 1）It + b

174、e（各种人称形式）+形容词（或分词）+ that It is concluded that 结论是 It is evident that 显然 It is needless to say （插入语）不用说 It is said that 据说 It is self-evident that 不言而喻 2）It is+副词+动词不定式 It is hardly too much to say 可以毫不夸张地说 It is not too much to say 这样说并不过分：可以说 3）as引出的习惯性句型及短语 as a matter of fact 事实上，实际上 as a result 结果（是）：因此，从而 as the illustration shows 如图所示 as it has been stated above 如上所述 转载请注明http:/http:/