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1、IC制造流程简介ANDYIC制造流程简介最新课件相关定义半导体是指导电能力介于导体和非导体之间的材料，其指四价硅中添加三价或五价化学元素而形成的电子元件，它有方向性可以用来制造逻辑线路使电路具有处理资讯的功能。半导体的传导率可由搀杂物的浓度来控制：搀杂物的浓度越高，半导体的电阻系数就越底。P型半导体中的多数载体是电洞。硼是P型的掺杂物。N型半导体的多数载体是电子。磷，砷，锑是N型的搀杂物。IC制造流程简介最新课件相关定义集成电路是指把特定电路所需的各种电子元件及线路缩小并制作在大小仅及2CM平方或更小的面积上的一种电子产品。IC制造流程简介最新课件相关定义集成电路主要种类有两种：逻辑LOGIC
2、及记忆体MEMORY。前者主要执行逻辑的运算如电脑的微处理器后者则如只读器READ ONLY 及随机处理器RANDOM ACCESS MEMORY等。集成电路的生产主要分三个阶段：硅镜片WAFER的制造，集成电路的制造及集成电路的包装PACKAGEIC制造流程简介最新课件Wafer StartWafer StartCMPCMPOxidationOxidationPVDPVD, , CVDCVDWafer CleaningWafer CleaningPhotolithographyPhotolithographyEtch (Dry or Wet)Etch (Dry or Wet)Annealin
3、gAnnealingImplantationImplantationThe OutlineWafer StartWafer StartCMPCMPWafer CleaningWafer CleaningIC制造流程简介最新课件製程IC制造流程简介最新课件The Introduction to The Manufacturing Process of VLSI ANDYANDYIC制造流程简介最新课件晶圓(Wafer) 晶棒成長 切片(Slicing) 研磨(Lapping) 清洗(Cleaning) 拋光(Polishing) 檢查(Inspection) IC制造流程简介最新课件MeltSe
4、edGraphite CrucibleGrowing CrystalNoncontaminating Liner( (a) Seed being lowereda) Seed being lowered down to melt down to melt ( (b) Seed dipped in meltb) Seed dipped in melt freezing on seed just freezing on seed just beginning beginning( (b) Partially grownb) Partially grown crystal crystalThe Cz
5、ochralski Method - 1IC制造流程简介最新课件(a) As-grown crystal(b) Grind crystal to remove undulations and saw to remove portions in resistive range(c) Saw into slices (with orienting flats ground before sawing) (d) Round edges of slice by grinding(e) Polish sliceCrystal to WafeIC制造流程简介最新课件微影(Photolithography)
6、原理：在晶片表面上覆上一層感光材料，來自光源的平行光透過光罩的圖形，使得晶片表面的感光材料進行選擇性的感光。感光材料：正片經過顯影(Development)，材料所獲得的圖案與光罩上相同稱為正片。負片如果彼此成互補的關係稱負片IC制造流程简介最新课件WaferWaferContact Printto expose resistWaferResistApply resist after priming(spinner)ResistOxideLight sourceProjection printto expose resistorWaferResistOxideProjection lensMa
7、skCondenser lensNext PageNext PagePhotolithography Process - 1MaskIC制造流程简介最新课件ContinueContinueWaferWaferWaferDevelop resistEtch oxideStrip resistDeveloped resist showing patternEtch to match resist patternResist removedPhotolithography Process - 2IC制造流程简介最新课件Doping: To get the extrinsic semiconducto
8、r by adding donors or acceptors, which may cause the impurity energy level. The action that adding particular impurities into the semiconductor is called “doping” and the impurity that added is called the “dopant”. Introduction to DopingDoping methods: 1.Diffusion 2.Ion ImplantationDoping methods: 1
9、.Diffusion 2.Ion ImplantationIC制造流程简介最新课件Pre-deposition: To put the impurities on the wafer surface.Generally used dopant resource furnace design: Carrier gasHeaterQuartz tubeSolid dopant source furnaceO2Liquid dopant sourceCarrier gasGas dopant sourceValveO2(a)(c)(b)Diffusion Process - 1Solid dopan
10、t source IC制造流程简介最新课件Drive-in: To implant the dopant into the wafer by the thermal processQuartz tubeQuartz tubeHeaterWaferGas outReaction roomGas inGas outWaferQuartz boats3-Zone heating element Dopants and gas inProfiling Tc(In the tube)Horizontal TypeHorizontal TypeVertical TypeVertical TypeVerti
11、cal TypeDiffusion Precess - 2IC制造流程简介最新课件1. The definition: A manufacturing process that can uniformly implants the ions into the wafer in the specified depth and consistence by selecting and accelerating ions. 2. The purpose: To change the resistance value of the semiconductor by implanting the dop
12、ant.3. Energy range (8 years ago)(1) General process：10 KeV - 180 KeV (0.35m) (100KeV for 0.18 m now)(2) Advanced process：10 KeV - 3 MeV ( 100 C/s Uniform Temperature Changing Low Thermal Budget (to compare with Furnace) To Avoid MOS DistortionIC制造流程简介最新课件Halogen-W Heater (vertical)Halogen-W Heater (horizontal)WaferGas outGas inTypical RTP SystemQuartz ShelfIC制造流程简介最新课件The EndThank you!IC制造流程简介最新课件
