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1、嵌入式系统架构软体设计q嵌入式系统架构软体设计 -using ARMqqDay #3,#4,#5 Modules Outlineq q 嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARM课程介绍课程介绍qDay #3Simple RISC Assembly Language ARM Assembly LanguageARM Development Suite 使用练习qDay #4Arm Instruction setImportant ASM Programming SkillsARM/THUMB/C InterworkingqDay #5ARM Exception Handl
2、erBuild ARM ROM ImageUse NET-Start! ucLinux BSP嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARM嵌入式系统产品设计流程概观嵌入式系统产品设计流程概观嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMqARM system-on-chip Architecture, 2nd ed.qARM architecture reference manual, 2nd ed.qARM Development Suite-Getting StartedqARM Development Suite-Developer GuideqAR
3、M Development Suite-Assembler Guidequclinux.org/q2019嵌入式系统开发经验qBuilding powerful platform with Windows CEqSoftware Engineering, A practitioners Approach 3rd ed.qProfessional Symbian Programming嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARM嵌入式系统架构软体设计 -using ARMModule #3-1: Simple RISC Assembly Concept嵌入式系统架构软体设计嵌
4、入式系统架构软体设计-using ARMRISC精简指令集精简指令集vs.CISC复杂指令集复杂指令集Hardware instruction decode logicPipeline executionSingle executionLarge microcode ROMs to decode instructionAllow little pipelineMany cycles to completer a single instructionA smaller die sizeA shorter development timeA higher performance Poor code
5、 density嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMMUO 一个简单的处理器一个简单的处理器嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMMUO指令集与资料路径指令集与资料路径指令Opcode功能LDA S0000ACC=memSSTO S0001memS=ACCADD S0010ACC=ACC+memSSUB S0011ACC=ACC-memSJMP S0100PC=SJGE S0101If ACC= PC=SJNE S0110If ACC!=0 PC=SSTP 0111stop指令规则嵌入式系统架构软体设计嵌入式系统架构软体设计-using A
6、RM指令执行范例指令执行范例qADD 0x16AACC:=ACC+mem0x16A嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARM运算范例运算范例C function:Main()C=A+B;MUO 机器指令LDA 0x100ADD 0x104STO 0x108指令Opcode功能LDA S0000ACC=memSSTO S0001memS=ACCADD S0010ACC=ACC+memSSUB S0011ACC=ACC-memSJMP S0100PC=SJGE S0101If ACC= PC=SJNE S0110If ACC!=0 PC=SSTP 0111stop嵌入式系统架
7、构软体设计嵌入式系统架构软体设计-using ARM练习：练习： MUO微处理器的运算微处理器的运算0x100 LDA 0x1000x002 SUB 0x1040x004 STO 0x1000x006 JNE 0x0000x008 STP请描述此段程式的动作，暂存器值的变化、与资料流。请用C语言来写出这段程式码。指令Opcode功能LDA S0000ACC=memSSTO S0001memS=ACCADD S0010ACC=ACC+memSSUB S0011ACC=ACC-memSJMP S0100PC=SJGE S0101If ACC= PC=SJNE S0110If ACC!=0 PC=S
8、STP 0111stop嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARM嵌入式系统架构软体设计 -using ARMModule #3-2: ARM Assembly Language嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMARM7TDMI资料流资料流e.g.r3:=r4+(r4,2)ADD r3,r4,r4,LSL#2 A bus B bus嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMARM 的暂存器的暂存器q30 general-purpose, 32 bits registersq1 Program Counter (PC)q1
9、 Current Program Status Register (CPSR)q5 Saved Program Status Registers (SPSR)User mode FIQ mode irq mode SVC mode abort mode undefined mode嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMProgram Status RegisterqCPSR: Currrent Program Status RegiterqSPSR: Saved Program Status Registerq Condition code flags -N: Neg
10、ative rsult from ALU - Z: Zero result from ALU - C: ALU operation Carried out - V: ALU operation overflowedq Inerrupt Disable bits- I: disable the IRQ- F: Disable the FIQq T bit - Architechture xT only- T=0: ARM state - T=1: Thumb stateq Q: Stickly Overflow flag- Architecture 5TE only- QADD, QSUBqJ:
11、 Processor in Jazelle stateArchitecture 5TEJ onlyqMode bitsSpecify the processor mode10000 User10001 FIQ10010 IRQ10011 SVC10111 Abort11011 Undef11111 System31 30 29 28 27 24 7 6 5 4 0N Z C V Q J undefined I F T mode嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMProgram counter R15qARM state:1.All ARM instructions
12、are four bytes long (one 32-bit word) and are always aligned on a word boundary.2.The PC value is stored in bits 31:2 with bits 1:0 undefined.qIn Thumb state:All instructions are 16 bits wide, and halfword alignedThe PC value is stored in bits31:1 with bits 0 undefined.qIn Jazelle state:All instruct
13、ions are 8 bits wide.The processor performs a word access to read 4 instructions at once.嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMLink Register R14qRegister 14 is the Link Register (LR).qThis register holds the address of the next instruction after a Branch and Link (BL) instruction, which is the instruction
14、 used to make a subroutine call.qAt all other times, R14 can be used as a general-purpose register嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMOther Register R0-R13qThe remaining 15 registers have no special hardware purpose.qTheir uses are defined purely by software.qBy convention, ARM assembly language use R13
15、 as Stack Pointer.qC and C+ compilers always use R14 as the Stack Pointer(SP)嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMStructure of ARM Assembly Language ModuleAREA Sectionname,attr,attrStart of New code or data section.CODE: contain machine instructions.READONLY: section should not be written to.Other attr:
16、DATA, NOINIT, READWRITE,Declares an entry point to a program.Labels.Declares the end of the source file.嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMCalling Subroutines Uses BLqBL destination destination is the label on the first instruction of the subroutine.BL does:place the return address in the link register
17、 (R14)sets PC to the address of the subroutine.In the subroutinewe can use “MOV pc,lr” to return.By convention, R0-R3 are used to pass parameters.嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMCalling Subroutines Example; name this block of code; mark first instruction; to execute; Set up parameters; Call subrouti
18、ne; angel_SWI reason_report Exception; ADP_Stopped_ApplicationExit; ARM semihosting SWI; Subroutine code; Return from subroutine.; Mark end of file嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMConstant Data TypesqNumbers Numeric constants are accepted in three forms:Decimal, for example, 123Hexadecimal, for examp
19、le, 0x7Bn_XXX where: n is as base between 2 and 9 xxx is a number in that base.qBoolean TRUE and FALSE must be written as TRUE and FALSE.qCharacters constants consist of opening and closing single quotes X, enclosing either a single character or an escaped character, using the standard C escape char
20、acters.qStrings consist of opening and closing double quotes “XXXX”. If double quotes or dollar signs are used within a string as literal text characters, they must be represented by a pair of the appropriate character.For example, you must use $ if you require a single $ in the string. The standard
21、 C escape sequences can be used within string constants.嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMqAlmost all ARM instructions can be conditionally executed.e.g.ADDS r0,r1,r2ADDEQ r0,r1,r2qExecute if the N,Z,C and V flags in the CPSR satisfy a condition specified in the instruction, otherwise, NOP.Conditional
22、 ARM Instructions嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMqAlmost every ARM instruction can be executed conditionally on the state of the ALU state flags in the CPSR.qAdd an S suffix to an ARM data processing instruction to make it update the ALU state flags in the CPSRE.g. ADDS r0,r1,r2; r0=r1+r2 and update
23、 ALU status in CPSR.qIn ARM state, you can:update the ALU status flags in the PSR on the result of a data operationexecute several other data operation without updating the flagsexecute following instructions or not, according to the state of the flags updated in the first operation.qIn Thumb state
24、most data operations always update the flagsand conditional execution can only be achieved using the conditional branch instruction (B).qDo not use the S suffix with CMP, CMN, TST, or TEQ. These comparison instructions always update the flagConditional Execution嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMALU St
25、atus Register in CPSRqN Set when the result of the operation was Negative.qZ Set when the result of the operation was Zero.qC when the result of the operation was Carry.A carry occurs if the result of an addition is greater than or equal to 232If the result of a instruction is positive,or as the res
26、ult of an inline barrel shifter operation in a move or logical instruction.qV Set when the operation caused oVerflow.Overflow occurs if the result of an add, subtract, or compare is greater than or equal to 231, or less than 231.qQ ARM architecture v5Eonly. Sticky flag.Used to detect saturation in s
27、pecial saturating arithmetic instructions (e.g. QAD, ASUB, QDADD, and QDSUB),Or overflow in certain multiply instructions (SMLAxy and SMLAWy)嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMConditional Code Suffixes嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMConditional Code ExamplesqADD r0,r1,r2;r0=r1+r2, dont update flagsqADD
28、S r0,r1,r2;r0=r1+r2, and update flagsqADDCSS r0,r1,r2;if C flag set then r0=r1+r2, and update flagsqCMP r0,r1;update flags based on r0-r1.qExample code sequence:MOV R0,#0LOOP ADD R0, R0, #1CMP R0, #10BNE LOOPSUB R1, R1,R0嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMWrite Efficient and small size Code by Conditio
29、nal Instruction嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMExerciseWrite program by ARM assembly, & evaluate the execution cost in clock.A Branch needs 3 cycles, others cost 1注：只需使用CMP, SUB, B这三个指令，加上条件式， 就可以完成While (r1!=r2) do if (r1r2)r1=r1-r2; elser2=r2-r1;嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARM 嵌入式系统架构软体设计 -using
30、ARM Module #3-3: ARM Development Suite使用练习嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMARM ADS 1.2Others: C & C+ LibrariesARM firmware suiteAM application libraryRealMonitor: for real time debug monitor嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMImplementation Integration嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMPre-configured Projec
31、t Stationary FilesqDebugThis build target is configured to built output binaries that are fully debuggable, at the expense of optimization.qReleaseThis build target is debuggable to build output binaries that are fully optimized, at the expense of debug information.qDebugRelThis build target is outp
32、ut binaries that de adequate optimization, and give a good debug view.嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMPossible Development Environment嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMReferenceqARM Developer Suie Version 1.2 Getting Startedq请用Chapter 3练习使用 ADS.嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARM嵌入式系统架构软体设计 -using ARM Mo
33、dule #3-4: ARM Instruction Set嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMARM 指令集特点指令集特点q所有指令为32 bitsADD r0, r1, r2;r0:=r1+r2q大部分的指令，可以在一个周期内执行完成q指令皆可为有条件式执行qLoad/store 架构.嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMThumb 指令集指令集qThumb指令长度为16 bits针对程式码的密度最佳化， 约为65%的ARM code size适合小记忆体系统Thumb指令支援的功能为ARM指令集的一部分执行期间必须切换到Thumb模
34、式ADDSr1,r1,#3ADDr1,#3嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMJazelleqJazelle 技术可以让ARM执行8-bit Java Bytecode硬件可以支援到95%的bytecodes速度约为一般软件JVM的五倍嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMARM 指令集分类指令集分类qBranch instructionsqData-processing instructionsqLoad and store instructionsqStatus register transfer instructionsqCoproc
35、essor instructionsqException-generating instructions.嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMBranch instructionsqB BranchqBL Branch with linkStore the return address to r14e.g. CMP r2, #0 BLEQ function function MOV PC, r14嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMBranch Instruction EncodingqThe range of the branch in
36、struction is +/- 32 MbytesqL: the branch and link variant.Assembly Format:BLSRmBLS嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMBranch instructions exampleqe.g. C if (a=0) unction 1 (1);ElsecFunction 1()function2();Function2()return;qASMfunction 1 STMFDr13!, r0-r4, r14 BL function2 LDMFDr13!, r0-r4, pcfunction2 M
37、OV pc, r14嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMData-processing instructions EncodingAssembly Format:S Rd, Rn,#S Rd, Rn,Rm, shift嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMData Processing OpodeAssembly Format:SRd, Rn #SRd, Rn Rm, Opcode Mnemonic MeaningEffect24:210000ANDLogical bit-wise AND Rd:=Rn & Op20001 EOR Logi
38、cal bit-wise excusive ORRd:=Rn EOR Op20010 SUBSubtractRd:=Rn-Op20011RSBReverse subtractRd:=Op2-Rn0100ADDAdd Rd:=Rn+Op20101 ADCAdd with carry Rd:=Rn+Op2+C 0110 SBCSubtract with carry Rd:=Rn-Op2+C-10111RSCReverse subtract with carry Rd:= Op2-Rn+C-11000TSTTest Rd:=Scc on Rn&Op21001TEQTest equivalence R
39、d:= Scc on Rn EOR Op21010CMPCompare Rd:=Scc on Rn-Op21011CMNCompare negated Rd:= Scc on Rn+Op21100ORRLogical bit-wise OR Rd:=Rn |Op21101MOVMove Rd:=Op21110BICBit clear Rd:=Rn AND NOT Op21111MVNMove negated Rd:=NOT Op2嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMExample Data-processing InstructionsqArithmetic ope
40、rationsADD r0,r1,r2;r0=r1+r2SUBr0,r1,r2; r0=r1-r2RSBr0,r1,r2; r0=r2-r1qBit-wise logical operationsAND r0,r1,r2; r0 = r1&r2ORRr0,r1,r2; r0 = r1| r2EORr0,r1,r2; r0 = r1 xor r2BICr0,r1,r2; r0 = and not r2; bit clear 嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMExample Data-processing Instructions (cont.)qRegister m
41、ovement operationsMOV r0,r2; r0=r2MVN r0,r2; r0=not r2 qComparison operations (set condition code bits N, Z, C, V)CMP r1,r2; set cc on r1-r2qImmediate operandsADD r3,r3,#1 ; r3=r3+1ANDr8,r7, #&ff; r8=r77:0& : base 16嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMShifterqLSL: Logical Left Shift (X2)qLSR: Logical Sh
42、ift Right (/2)qASR Arithmetic Right ShiftqROR: Rotate Right嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMShifter Applicationse.g. #1ADD r3,r2,r1, LSL #3;r3:= r2+8*r1e.g. #2r0=r1*5 r0=r1+(r1*4) ADD r0 ,r1, r1, LSL #2嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMMultiply instruction binary encodingAssembly FormatMULS Rd, Rm, RsM
43、LAS Rd, Rm, Rs, RnS RdHi, RdLo, Rm, RsRdHi: the most significant 32 bits of 64-bit format numberRdLo: the least significant 32 bits of 64-bit format numberOpcode Mnemonic Meaning Effect23:21000 MUL Multiply (32-bit result)Rd:=(Rm*Rs)31:0001 MLA Multiply-accumulate (32-bit result)Rd:=(Rm*Rs+Rn)31:010
44、0 UMULL Unsigned multiply longRdHi:RdLo:=Rm*Rs101 UMLAL Unsigned multiply-accumulate longRdHi:RdLo+=Rm*Rs110 SMULL Signed multiply longRdHi:RdLo:=Rm*Rs111 SMLAL Signed multiply-accumulate longRdHi:RdLo+=Rm*Rs嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMAssembly Format:CLZS Rd, RmqSets Rd to the number of the bit
45、 position of hr most significant 1 in Rm. If Rm=0 Rd=32.qE.g.MOV r0, #&100CLZr1, R0r1=8Count Leading Zeros Instruction (v5T only)嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARM练习练习q用ARM Assembly写一个程式，=mul_包含一个subroutine用来做x10的运算.q用ADS环境。q不支持具有乘法器功能的ARM Core。main()x=5;y=mul_ten(x);int mul_ten(x)return 10*x; 嵌入式系统架构
46、软体设计嵌入式系统架构软体设计-using ARM Single Word and Unsigned Byte Data Transfer Instruction Binary EncodingAssemble Format:LDR|STRB Rd,Rn, !; Pre-indexed formLDR|STRB Rd,Rn, ; Post-indexed formLDR|STRB Rd,LABEL; PC-relative form嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMLoad and Store ExamplesqSingle register and store
47、LDRr0,r1 ;r0:=mem32r1STR r0r1; mem32r1:=r0qBase plus offset addressing Pre-indexing LDR r0,r1, #4 ;r0:=mem32r1+4Auto indexing LDR r0,r1, #4! ;r0:=mem32r1+4, r1=r1+4Post-indexed LDR r0,r1, #4 ;r0:=mem32r1, r1=r1+4PC-relative LDR r1, UART_ADD ; UART address into r1 STRBr0,r1; store data to UART UART_A
48、DD &10000000; address literal 嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMHalf-word and Signed Byte Data Transfer Instruction Binary EncodingAssemble Format:LDR|STRH |SH|SB Rd;Rn, ! ; Pre-indexed formLDR|STRH |SH|SB Rd;Rn, ; Post-indexed form An unsigned value is zero-extended to 32 bits when loaded; A singed v
49、alue is extended to 32 bits by replicating the most significant bit of the data.嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMHalf-word Load/Store ExampleADR r1,ARRAY1; half-word array startADR r2,ARRAY2; word array startADR r3,ENDARR1; ARRAY1 end +2LOOP LDRSH r0,r1,#2; get signed half-wordSTR r0,r2,#4; save word
50、CMP r1,r3; check for end of arrayBLT LOOP; if not finished, loop嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARM练习：字串复制练习：字串复制q写一个Assembly程序做字串复制的动作q用ADS环境A=“Hello, this is a sunny day!”B=“ “嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMMultiple Register Data Transfer Instruction Binary EncodingIn a non-user mode, CPSP may be re
51、stored by:LDM|Rn!, Full or empty: The stack pointer can either point to the last item in the stack (a full stack), or the next free space on the stack (an empty stack).Assembly Format:LDM|STM Rn!, IA: Increment after.IB: Increment before.DA: Decrement after.DB: Decrement before嵌入式系统架构软体设计嵌入式系统架构软体设计
52、-using ARMExample Addressing Mode for LDM/STM嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMISR Exampleqe.g. Interrupt handler_irq void IRQHandler(void) volatile unsigned int *base=(unsigned int *) 0x80000000;If (*base=1) C_int_handler_1( ); *(base+1)=( ); IRQHandler PROCSTMFDspl,ro-r4,r12,lrMOVr4,#0x80000000LDRr0
53、, r4,#0SUBsp,sp,#4CMPr0,#1 BLEQ C_int_handlerMOV r0,#0STR r0,r4,#4ADD sp,sp,#4LDMFD spl,r0-r4,r12,lrSUBSpc,lr,#4嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMSwap Memory And Register Instruction Binary EncodingAssembly Format:SWPB Rd,Rm,Rn嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMSWP ExampleADR r0,SEMAPHORESWPB r1,r1,r0 ;
54、exchange byter0r1r?0嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMStatus Register to General Register Transfer Instruction Binary EncodingAssembly Format:MRSRd,CPSR|SPSRE.g.MRS r0, CPSR; move the CPSR to r0MRS r3, CPSR; move the SPSR to r3Note: The SPSR form should not be used in user or system mode.嵌入式系统架构软体设计嵌入
55、式系统架构软体设计-using ARMTransfer to Status Register Instruction Binary EncodingAssembly Format:MRSCPSR_f|SPSR_f, #MRSCPSR_|SPSR_, RmC - the control field PSR7:0X the extension field PSR15:8S the status field PSR23:16F the flags field PSR31:24嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMMSR ExampleqSet N,C,V,Z flages:
56、MSRCPSR_f, #&f0000000 ; set all the flagsqSet C flag, preserving N,Z, and VMRSr0,CPSR ; move the CPSR to r0ORRr0,r0,#&20000000 ; set bit 29 of r0MSR CPSR_f,r0 : move back to CRSR嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARM练习：切换练习：切换ARM操作模式操作模式q写一段程序，将ARM由Supervisory mode切换到IRQ mode。q用ADS环境。31 30 29 28 27 24 7 6
57、 5 4 0N Z C V Q J underfined I F T mode q Mode bits Specify the processor mode 10000User 10001 FIQ 10010 IRQ 10011 SVC 0111Abort 11011 Undef 11111 System嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMCoprocessor InstructionsqThere are 3 types:Coprocessor data operationsCDP:initiate a coprocessor data processing op
58、erationCoprocessor Register transfersMRC:Move to ARM register from coprocessor registerMCR:Move to coprocessor register from ARM registerCoprocessor Memory transferLDC:load coprocessor register from memorySTC:store from coprocessor register to memory嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMException-generati
59、ng & Semaphore InstructionsqSWIUsed to cause a Software Interrupt exception to occurSWI SWI 0x123456qBKPTUsed fro software breakpoints in ARM architecture 5 or above. Cause a Prefetch Abort exception to occur.BKPT 嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMSummary of ARM ArchitecturesCore ArchitectureARM1v1ARM
60、2v2ARM2as, ARM3v2aARM6, ARM600, ARM610v3ARM7, ARM700, ARM710v3ARM7TDMI, ARM710T, ARM720T, ARM740Tv4TStrongARM, ARM8, ARM810v4ARM9TDMI, ARM920T, ARM940Tv4TARM9ES, XScale Microarchitecturev5TEARM10TDMI, ARM1020Ev5TE926EJ-S/1026EJ-Sv5TEJ嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMReferenceqS.Furber, ARM system-on-
61、chip Architecture, 2nd ed. Addison-WesleyqSeal. ARM architecture reference manual, 2nd ed. Addison-WesleyqARM Development Suite User Guide嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARM 嵌入式系统架构与软体设计 using ARMModule #3-5: Important ARM ASM Programming Skills嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMLoad Constant into Registe
62、rqDirect loading with MOV and MVNqLoading with LDR Rd,=const嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMDirect Load Constant into RegisterqMovcondS,Operand2Load immediate constant to registerE.g.MOV R1,0x18 ;R1=0x18Can load any 8-bit constant, giving a range of 0x00 to 0xFFqMVN: load the bitwise complement of t
63、hese values. The numerical values are (n+1).Compiler ERROR MSG: Immediate n out of range for this operation.224嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMLoading with LDR Rd,=constqThe LDR Rd,=const pseudo-instruction can construct any 32-bit numeric constant in a single instructionqThe LDR pseudo-instruction
64、generates the most efficient code for a specific constant:If the constant can be constructed with a MOV or MVN instruction, the assembler generates the appropriate instruction.If the constant cannot be constructed with a MOV or MVN instruction, the assembler:Places the value in a literal pool.Genera
65、tes an LDR instruction with a program-relative address that reads the constant from the literal pool.qe.g.:LDR Rn,pc,#offset to literal pool;load register n with one word from the address pc+offsetLiteral Pool: A portion of memory embedded in the code to hold constant values.嵌入式系统架构软体设计嵌入式系统架构软体设计-u
66、sing ARMLDR & Literal Pool Example; ; c:ARMADSv1_2Examplesasmloadcon.sAREALoadcon, CODE, READONLYENTRYSTARTBLfunc1BLfunc2stop MOVr0,#0x18; =MOV R0, #42LDRr1, =0x20196SWI0x123456func1LDRr0, =42; =MOV R0, #42LDRr1, =0x55555555; =LDR R1, PC, #offset to Literal Pool lLDRr2, =0xFFFFFFFF; =MVN R2, #0MOVpc
67、, lrLTORGLitetal Pool l constainsLitetal 0x55555555func2LDRr3, =0x55555555; =LDR R3, PC, #offset to Literal Pool lLDRr4, =0x66666666; If this is uncommented it is out of reach; fails, because Literal Pool 2MOV pc, lrLargeTableSPACE 4200; Starting at the current location; clears a 4200 bytes area of
68、memory; to zero, reserves a zeroed block of memory; Literal Pool 2 is emptyEND嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMLoading Addresses into RegistersqDirect loading with ADR and ADRLqLoading addresses with LDR Rd, =label.嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMDirect Loading with ADRqThe assembler converts an ADR
69、Rn, label pseudo-instruction by generating:A single ADD or SUB instruction that loads the address, if it is in rangeAn error message if the address cannot be reached in a single instruction.The offset range is 255 bytes for an offset to a non word-aligned address, and 1020 bytes (255 words) for an o
70、ffset to a word-aligned address.E.g.ADRr2, Label+1000ADR r2, Label +211嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMDirect Loading with ADRLqThe assembler converts an ADR Rn, label pseudo-instruction by generating:Two data-processing instruction that load the address, if it is in rangeAn error message if the add
71、ress cannot be constructed in two instructionsThe range of an ADRL pseudo-instruction is 64KB for a non word-aligned address sand 256 KB for a word-aligned address.E.g. ADRL r2, Label +4300嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMADR and ADRL Example; c:ARMADSv1_2Examplesasmadrlabel.sAREAadrlabel, CODE, READ
72、ONLYENTRYSTARTBLfuncstopMOVr0,#0x18; angel_SWIreason_ReportExceptionLDRr1,=0x20196; ADP_Stopped_ApplicationExitSWI0x123456; ARM semihosting SWILTORG; Create a literal poolFuncADRr0, Start; =SUB r0, PC, #offset to StartADRr1, DataArea; =ADD r1, PC, #offset to DataArea;ADRr2, DataArea+4300; =This woul
73、d fail because the offset ; cannot be expressed by operand2 of an ADDADRLr2, DataArea+4300; =ADD r2, r2, #offset1; ADD r2, r2, #offset2MOVpc, lr; ReturnDataAreaSPACE 8000; Starting at the current location.; clears a 8000 bytes area of memory to zero END嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMLoading Address
74、es with LDR Rd,=labelqLoad any 32-bit constant into a registerqThe assembler converts an LDR r0,=label pseudo-instruction by:Placing the address of label in a literal pool (a portion of memory embedded in the code to hold constant values).Generating a program-relative LDR instruction that reads the
75、address from the literal pool, for example: LDR rn pc, #offset to literal pool ; load register n with one word from the address pc + offset 嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMExample for LDR Rd, =label; c:ARMADSv1_2examplesasmldriabel.sAREALDRlabel, CODE, READONLYENTRYSTARTBLFunc1BLfunc2stopMOVr0,#0x18
76、LDRr1,=0x20196SWI0x123456func1LDRr0, =start; =LDR R0, PC, #offset into Literal Pool 1LDRr1, =Darea+12; =LDR R1, PC, #offset into Literal Pool 1LDRr2, =Darea+6000; =LDR R2, PC, #offset into Literal Pool 1MOVpc, lrLTORG; Litetal Pool l func2LDRr3, =Darea+6000; =LDR R3, PC, #offset into Literal Pool 1(
77、sharing with previous literal);LDRr4, =Darea+6004; If uncommented produces an error as Literal Pool 2 is out of rangeMOV pc, lrDareaSPACE8000; Literal Pool 2 is out of range of the LDR instructions aboveEND嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMExercise: Implement a Jump Table; c:ARMADSv1_2examplesasmjump.
78、sAREAJump, CODE, READONLYCODE32Num EQU2; Number of entries in jump tableENTRYSTARTMOVr0,#0; Set up the three parametersMOVr0,#3MOVr0,#2BLarithfunc; Call the functionstop MOVr0,#0x18LDRr1,=0x20196SWI0x123456arithfuncCMPr0, #num; Label the functionMOVHSpc, lr; Treat function code as unsigned integerAD
79、Rr3, JumpTable; if code is =num then simply returnLDRpc, R3,R0,LSL#2; load address of jump tableLTORG; Jump to the appropriate routineJumpTableDCDDoAddDCDDoSubDoAddADDr0, r1, r2; Operation 0MOVpc, lr; ReturnDoSubSUBr0, r1, r2; Operation 1MOVpc, lr; ReturnEND; Mark the end of the file嵌入式系统架构软体设计嵌入式系统
80、架构软体设计-using ARMExercise: String Copy; c:ARMADSv1_2examplesasmstrcopy.sAREAStrCopy, CODE, READONLYENTRYStartLDRr0,=srcstr; Point to first stringLDRr0,=dststr; Point to second stringBLstrcopy; Call subroutine to do copyStopMOVr0,#0x18LDRr1,=0x20196SWI0x123456strcopyLDRBr2, r1,#1; Load byte and update
81、 addressSTRBr2, r0,#1; Store byte and update addressCMPr2, #0; Check for zero terminatorBNEstrcopy; Keep going if notMOVpc, lrAREAStrings, DATA, READWRITEsrcstrDCBFirst string-source,0dststrDCBSecond string-destination,0ENDTrace this program!And make a flow chart.嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMLoad
82、 and Store Multiple Register InstructionsqAn efficient way of moving the contents of several registers to and from memoryqUsed for block copy and for stack operations at subroutine entry and exitqThe advantages include: (Compare to single L/S)Smaller code sizeSingle instructions fetch overheadOn unc
83、ached ARM processors, the first word of data transferred by a load or store multiple is always a nonsequential memory cycle, but all subsequent words transferred can be sequential memory cycles.嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMLDM and STM InstructionsqThe load ( or store ) multiple instruction loads
84、(stores) any subset of the 16 general-purposes registers from (to) memory, using a single instruction.qSyntax:LDM cond address-mode Rn1, reg-list!:Specifies base register write back. If this is specified, the address in the base register is updated after the transfer.:Specifies that the CPSR is rest
85、ored from the SPSR. It must be used only from a privileged mode (i.e. other than user mode).qE.g.LDMIA r0! r2-r9STMIA r1, r0-r10.嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMAddressing mode for LDM/STMqIA: Increment afterqIB: Increment beforeqDA: Decrement afterqDB: Decrement beforeqFull of empty: The stack poin
86、ter can either point to the last item in the stack (a full stack), or the next free space on the stack (an empty stack).qNote: The ARM-Thumb Procedure Call Standard (ATPCS), and ARM and Thumb C and C+ compiles always use a full descending stack.嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMExample Addressing mode
87、 for LDM/STM嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMStacking Registers for Nested SubroutinesSubroutine STMFD sp!, r5-r7,r ; Push work registers and lr; code Note: Your codes use r5,r6,r7,lr.BL xxxx_xxxx; codeLDMFD sp!, f5-f7,pc ; Pop work registers and pc嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMUsing Macro MACRO$La
88、bel TestAndBranch $dest,$reg,$cc$Label CMP $reg, #0 B$cc $dest MENDAfter substitution this becomes:test CMP r0, #0 BNE NonZero NonZerotest TestAndBranch Non Zero, r0, NE NonZeroThis macro can be invoked as follows:嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARM 嵌入式系统架构与软体设计 using ARMModule #4-1: ARM-Thumb Interwor
89、king嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMOutline嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMARM-Thumb Procedure Call Standard (ATPCS)qTo ensure that separately compiled or assembled subroutines can work together.qRegister roles and namesqThe stackA full, descending stackEight-byte alignment at all external interface
90、s. 嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMParameter PassingqNonvariadic: A routine with a fixed number of arguments is.The first integer arguments are allocated to r0-r3 in order.Remaining parameters are allocated to the stack in order.qVariadic routine: A routine with a variable number of arguments.a1-a4,
91、 a1 first.The stack, lowest address first.#include int ShowVar(char *szTypes, .)va_list vl;va_start (vl, szTypes);.void main()ShowVar(fcsi,32,4f,a,Test string,4);嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMWhen to Use InterworkingqCode densityThumb state has better code densityqSpeed considerationRunning in ARM
92、 state has better efficiency than Thumb state.qFunctionalityThumb instructions are less flexible than their ARM equivalents.Some operations are not possible in thumb state.e.g. enable/disable interrupt & state change.qException handingThe processor automatically enters ARM state when a processor exc
93、eption occurs.This means that the first part of an exception handler must be coded with ARM instructions, even if it re-enters Thumb state to carry out the main processing of the exception.qStandalone Thumb programsqA thumb-capable ARM processor always starts in ARM state.嵌入式系统架构软体设计嵌入式系统架构软体设计-usin
94、g ARMNon-interworking Function CallqImplementing a function call usually requires two steps:Store the return address in the link register (LR)Branch to the address of the required functionvoid mouse() monkey(); void monkey() return(); mouse() BL monkey ; monkey() MOV pc, lr嵌入式系统架构软体设计嵌入式系统架构软体设计-usi
95、ng ARMARM/Thumb Interworking Function CallqUse BX or BLXqBX does not store return address in LR automatically.- return from function by BX LR to original state.qv5T supports BLX嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMBLX ExampleqA call to Thumb subroutine:CODE32; ARM code follows.BLXTSUB; call thumb routine
96、.CODE16; start of Thumb codeTSUB.; Thumb subroutineBXr14; return嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMARM/Thumb Interworking ExampleAREAAddReg. CODE,READONLY ;Name this block of code.ENTRY ; Mark first instruction to call.mainADRr0, ThumbProg + 1 ;Generate branch target address ; and set bit 0, hence arri
97、ve ; at target in Thumb state.BXr0 ; Branch exchange to ThumbProgCODE16 ; Subsequent instructions are Thumb codeThumbProgMOV r2,#2 ; Load r2 with value 2MOV r3,#3 ; Load r2 with value 3ADD r2,r2,r3 ; r2=r2+r3ADR r0,ARMProgBX r0 CODE32 ; Subsequent instructions are ARM code.ARMProgMOV r4,#4MOV r5,#5A
98、DD r4,r4,r5StopMOV r0,#0x18 ; angel_SWIreason_ReportExceptionLDR r1, =0x20196 ; ADP_Stopped_ApplicationExitSWI 0x123456END ; Mark end of this file嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARM练习：练习： ARM/Thumb Interworking #1qTrace code:ADSv1_2exampleasmthumbsub.mcpMonitor CPSR with PC嵌入式系统架构软体设计嵌入式系统架构软体设计-using
99、ARMC Functions&InterworkingqCompiler C to run n Thumb&support interworkingtcc -c-g-O1-apcs/interwork thumbmain.cqCompiler C to run in ARM state & support intherworking armcc -c-g-O1 -apcs/interwork armsub.cqLinkarmlink thumbmain.o armsub.o -o thumbtoarm.axf -info veneers ; By armcc apcs/interwork;By
100、 tcc apcs/interworkxxxxxxVoid xxx() STMFD SP!, r4-r11, lr PUSH SP!, r4-r7,lr BL sub BL subfunc(); LDMFD SP!, r4-r11, lr POPSP!, r4-r7, lr BXlr POPr3 BXr3嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARM练习：练习： ARM/Thumb Interworking #2ADSv1_2examplesinterwork*.c1.ARM (main) code calling a Thumb subroutine2.armcc -c-g
101、-O1 - apcs/interwork armmain.c3.tcc -c -g-O1 -apcs/interwork thumbsub.c4.armlink armmain.o thumbsub.o -o armtothumb.axf -info veneers2.Thumb (main) code calling a Arm subroutine3.tcc -c-g-O1 -apcs/interwork thumbmain.carmcc -c -g-O1 apcs/interwork armsub.carmlink thumbmain.o armsub.o o thumbtoarm.ax
102、f -info veneersqRun the code by AXD嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMMixing C & AssemblerqInline Assembler qC calls ASM functionqASM call C function嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMInline AssemblerqThe ARM C compiler support inline assembly language with the _asm specifier.qThe ARM C+ compilers support
103、 the asm syntax proposed in the ANSI C+ Standard, with the restriction that the string literal must be a single string. e.g:asm(“instruction;instruction”);qARM C+ supports the C compiler _asm sytax._asm Instruction ; instructioninstruction 嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMRestriction of Inline Assemb
104、lerqNot supportLDR Rn, =expressLabel expressionADR, ADRL& cant be used to express hex. (use 0x prefix instead)BX, BLXqCant write to PC嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMString Copy Example#include Int main(void)const char *a=“Hello world!”;char b20;_asm MOVR0, a MOVR1, b BL my_strcpy, R0, R1printf(“Ori
105、ginal string: %sn”,a);printf(“Copied string: %sn”,a);return 0;Void my_strcpy(char *src, const char *dst ) int ch; _asm loop:#ifndef_thumb / Arm version LDRBch,src, #1 STRBch,dst,#1#else /Thumb version LDRBch, src ADDsrc,#1 STRBch,dst ADDdst,#1#endif CMPch,#0 BNEloop 嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMS
106、ome Issues to Use Inline AssemblerqUse r0-r3, ip, lr and CPSR with caution.E.g.Int funct(int x)._asmadd r0,r0,#1/we cant assert x is in r0add x,x,#1/correct usageqDont save &restore physical registers.E.g.Int funct(int x)._asmstmfd sp! r0/save r0add r0,x,1eor x,r0,xldmfd sp!, r0/restore r0嵌入式系统架构软体设
107、计嵌入式系统架构软体设计-using ARMASM calls C example ; int f(int i) return g(i,2*i,3*i,4*i,5*i);EXPORT fAREA f, CODE, READONLYIMPORT g; i is in r0str LR,SP, #-4!; preserve lrADD r1,r0,r0; computer 2*i (2nd param)ADD r2,r1,r0; computer 3*i (3nd param)ADD r3,r1,r2; computer 5*iSTR r3, sp,#4!; 5th param on stackA
108、DD r3,r1,r1; computer 4*i (4nd param)BL g; branch to C functionADD sp, sp, #4; remove 5th paramLDR pc,sp,#4; returnENDInt g(int a, int b, int d, int e) return a+b+c+d+e;嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMAccess C Global VariablesqUse “IMPORT”qUse “LDR/STR”qE.g.AREAglobal_variable, CODE, READONLYEXPORT
109、asmsubIMPORT glob_varasmsubldrr1,=glob_var; read address of glob_var; into r1 from literal poolldrr0, r1addr0, r0, #10strr0, r1movpc, lrEND嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMC call ASM Exampleinstall_directoryexampleasm as strtest.c and scopy.s#include extern void strcopy(char*d, const char *s);int mai
110、n() const char *srcstr = “First string -source”; char dststr = “Second string - destination”;/ *dststr is an array since were going to change it*/printf(“Before copying:n”);printf(“%sn %sn”,srcstr,dststr);strcopy(dststr,srcstr);printf(“After copying:n”);printf(“ %sn %sn”,srcstr,dststr);return(0); AR
111、EA Scopy,CODE,REAONLY EXPORT strcopystrcopy;r 0 points to destination string.; r1 points to source string. LDRB r2,r1,#1; Load byte and update address. STRB r2,r0,#1; Store byte and update address. CMP r2,#0; Check for zero terminator. BNE strcopy; Keep going if not. MOV pc,lr; Return. END 嵌入式系统架构软体
112、设计嵌入式系统架构软体设计-using ARM练习：练习： Inlie IRQ Controllerq分别写一个disable interrupt 和enable interrupt 的inline assembler subroutine。_inline void enable_IRQ(void)._inline void disable_IRQ(void).q在c 的main function 去呼叫执行嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARM嵌入式系统架构软体设计 -using ARMModule #4-2: ARM Exception Handler嵌入式系统架
113、构软体设计嵌入式系统架构软体设计-using ARMException Type & Vector Address嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMException Handling by ARM CoreqWhen an exception occurs, the banked versions of R14 and the SPSR for the exception mode are used to save state as follows:1. R14_ = return link2. SPSR_ = CPSR3. CPSR4:0 = exceptio
114、n mode number4. CPSR5 = 0/*Execute in ARM state*/5. if = = Reset or FIQ then?6. CPSR6 = 1/*Disable fast interrupt else CPSR6 is unchanged*/7. CPSR7 = 1/* Disable normal interrupts*/8. PC = exception vector addressq Summary:Copy PC into r14_mode, save CPSR into SPSRChange to appropriate exception mod
115、ePC is force to 0x0-0x1cPriority ExceptionHighest 1 Reset 2 Data Abort 3 FIQ 4 IRQ 5 Prefetch AbortLowest 6 Undefined instruction SWI嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMReset Exception1. R14_svc = UNPREDICTABLE value2. SPSR_svc = UNPREDICTABLE value3. CPSR4:0 = 0b10011/*enter supervisory mode*/4. CPSR5
116、= 0/*Execute in ARM state*/5. CPSR6 = 1/*Disable fast interrupts*/6. CPSR7 = 1/*Disable normal interrupts*/7. If high vectors configured then PC = 0xFFFF0000else PC = 0x00000000嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMUndefined Instruction ExceptionqWhile to execute an co-processor instruction, ARM cant get
117、response from co-processor.qAttempt to execute an instruction that is UNDEFINED.qCan be used for software emulation of a coprocessor in a system that does not have physical coprocessor.qAction performed:1.R14_und = address of next instruction after the undefined instruction 2.SPSR_und = CPSR3.CPSR4:
118、0 = 0b11011/*enter Undefined mode*/4.CPSR5 = 0/*Execute in ARM state*/5.CPSR6 /*unchanged*/6.CPSR7 = 1/*Disable normal interrupts*/7.If high vectors configured then8. PC = 0xFFFF00049. else10. PC = 0x00000004 嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMSoftware InterruptqSoftware Interrupt Instruction (SWI) ent
119、ers supervisor mode.qAction performed:1.R14_svc = address of next instruction after the undefined instruction 2.SPSR_svc = CPSR3.CPSR4:0 = 0b10011/*enter supervisor mode*/4.CPSR5 = 0/*Execute in ARM state*/5.CPSR6 /*unchanged*/6.CPSR7 = 1/*Disable normal interrupts*/7.If high vectors configured then
120、8. PC = 0xFFFF00089. else10. PC = 0x00000008 嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMReturn from Undefined Instruction&Software Interrupt ExceptionsqSimpleMOVSpc, lrqIn exception handlerSTMFDsp!, reglist, lr.LDMFDsp!, reglist, pc: Auto restore CPSR from SPSR.嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMPrefetch Abort Ex
121、ceptionqIf processor attempts to fetch an instruction from an illegal address, the instruction is marked as invalid. (in pipeline)qWhen reach the invalid instruction, prefetch abort exception is generated.1.R14_abt = address of aborted instruction +4 2.SPSR_abt = CPSR3.CPSR4:0 = 0b10111/*enter Abort
122、 mode*/4.CPSR5 = 0/*Execute in ARM state*/5.CPSR6 /*unchanged*/6.CPSR7 = 1/*Disable normal interrupts*/7.If high vectors configured then8. PC = 0xFFFF000C9. else10. PC = 0x0000000C 嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMReturn from Prefetch Abort ExceptionqSimpleSUBSpc, lr,#4qException handlerSUBSlr,lr,#4S
123、TMFDsp!, reglist, lr.LDMFDsp!, reglist, pc嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMData AbortqSignaled by the memory system.qAction performed:1.R14_abt = address of aborted instruction +8 2.SPSR_abt = CPSR3.CPSR4:0 = 0b10111/*enter Abort mode*/4.CPSR5 = 0/*Execute in ARM state*/5.CPSR6 /*unchanged*/6.CPSR7 =
124、 1/*Disable normal interrupts*/7.If high vectors configured then8. PC = 0xFFFF00109. else10. PC = 0x00000010嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMReturn from Data Abort exceptionqSimpleSUBSpc, lr,#8qException handlerSUBSlr,lr,#8STMFDsp!, reglist, lr.LDMFDsp!, reglist, pc嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMFIQ
125、 Exception Handling by ARMWhen an FIQ is detected, the following actions are performed:R14_fiq = address of next instruction to be executed +4SPSR_fiq = CPSRCPSR4:0 = 0b10001/*enter FIQ mode*/CPSR5 = 0/*Execute in ARM state*/CPSR6 = 1 /*Disable fast interrupts*/CPSR7 = 1/*Disable normal interrupts*/
126、If high vectors configured then PC = 0xFFFF001Celse PC = 0x0000001CTo return after servicing the interrupt, use:SUBS PC, R14,#4嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMFIQ Exception Handler by ProgrammerqYour FIQ handlerSUBSlr, lr,#4STMFDsp!, r0-r4, lr.LDMFDsp!, r0-r4, pc嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMIRQ E
127、xceptionqAction performed:1.R14_irq = address of next instruction to be executed +42.SPSR_abt = CPSR3.CPSR4:0 = 0b10010/*enter IRQ mode*/4.CPSR5 = 0/*Execute in ARM state*/5.CPSR6 /*unchanged*/6.CPSR7 = 1/*Disable normal interrupts*/7.If high vectors configured then8. PC = 0xFFFF00189. else10. PC =
128、0x00000018ReturnSUBSpc,lr,#4嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMImplement a SWI HandlerqADSv1_2examplesswi*main.cinstalls the SWI vector in the exception table, then calls SWIs (0, 1, 2 & 3) via_swi()ahandle.stop-level SWI handler written in assembler. Identify ARM&thumb SWIs then pass to chandle.c for
129、processing.chandle.csecond-level SWI handler, called from ahandle.s.SWIs 0, 1, 2 & 3 execute some simple arithmetic.Swi.hcontains the definitions of _swi(), _swi(1), _swi(2) &_swi(3) 嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMCalling SWI from An Application qIn assembly, set up required register values then is
130、sue SWI.MOVr0,#65SWI0x0;call SWI 0x0 with parameter value in r0qC/C+, declare the SWI as an _SWI function, and call it._swi() void my_swi(int);my_swi(65);qProvide that:Any arguments are passed in r0-r3 only.Any results are returned in r0-r3 only. If there are 2-4 return values, those must be returne
131、d by a structure.Directive as _value_in_regs嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMSWI Function Declare&Usage/ from exampleSWIswi.h_swi(0) int multiply_two(int, int);_swi(1) int add_two(int, int);_swi(2) int add_multiply_two(int, int, int, int);struct four_resultsint a;int b;int c;int d;_swi(3) _value_in_r
132、egs struct four _results many_operations(int, int, int, int);/ calling examplestructure four_results res_3;res_3 = many_operations(1, 2, 3, 4);add_two(1, 2);嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMParameters PassingqWe can pass values in and out of a SWI handler written in C, provided that the top-level han
133、dler passes the stack pointer into the C function as the second parameter.MOVr1, spBL C_SWI_HandlerParameter0 = reg0Parameter1 = reg1Parameter2 = reg2Parameter3 = reg3qWrite backreg0 = updated_value_0reg1 = updated_value_1reg2 = updated_value_2reg3 = updated_value_3嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMId
134、entify SWIqWhen a SWI handler is entered, tit must establish which SWI is being called.Load the SWI instruction that cause the exception.LDR r0, lr, #-4Extract the SWI number by clearing the 31-24 bits.BICr0,r0,#0xFF000000嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMUsing SWI in Supervisory ModeqCall a SWI in su
135、pervisory mode LR_SVC and SPSR_SVC are corrupted.qTherefore, we must store LR_SVC and SPSR_SVC when a SWI is called. MRSr0, spsr; Get spsrSTMFDsp!, r0; Store spsr onto stack.LDMFDsp!, r0; get spsr from stackMSRspsr_cf, r0; restore spsr嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMIdentify SWI from Arm/Thumb.T_bit
136、 EQU 0x20SWI_HandlerSTMFDsp!, r0-r3, r12, lr ; Store registersMOVr1, sp; Set pointer to parametersMRSr1, spsr; Get spsrSTMFDsp!, r0; Store spsr onto stackTSTr0, #T_bit; Occurred in Thumb state?LDRNEH r0, lr,#-2; Yes: Load halfword andBICNE r0,r0,#0xFF00; extract comment fieldLDREQr0, lr,#-4; No: Loa
137、d word andBICEQr0,r0,#0xFF000000; extract comment field ; r0 now contains SWI number ; r1 now contains pointer to stacked registersBLC_SWI_Handler; Call main part of handler.嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMSimple C SWI Handlervoid C_SWI_Handler(unsigned swi_num)switch(swi_num)case0:.break;case1:.bre
138、ak;case2:.break;.嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMInstall an Exception Handler During Development WorkUnsigned Install_Handler(unsigned routine, unsigned *vector)unsigned vec, old_vec;vec = (routine (unsigned)vector - 8)2;/-8 for prefetching, for word offsetif (vec & 0xff000000)/check is branch offse
139、t is out of limit?printf(“Handler greater than 32MBytes from vector”);vec = 0xea000000 | vec;/ 0xea000000 the opcode of branch inst.old_vec = *vector;*vector = vec;return (old_vec);Usage:unsigned *swi_vec = (unsigned *)0x08;extern void SWI_Handler(void);Install_Handler(unsigned) SWI_Handler, swi_vec
140、);嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARM练习：增加一个练习：增加一个SWI功能功能q利用ADS和AXD Trace exampleSWI 的范例程式q自行增加一个运算功能swi(4) return (regs0+regs1)*10。嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMC Interrupt Handlers_irq void IRQHandler (void)volatile unsigned int *base = (unsigned int *) 0x80000000;if(*base = = 1)c_int_handler();*(
141、base+1) = 0;Note: _irq does not provide reentrant processing嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMCompiled _irq; with_irqIRQHandler PROCSTMFDsp!,r0-r4,r12,lrMOVr4,#0x80000000LDRr0,r4,#0SUBsp,sp,#4CMPr0,#1BLEQC_int_handlerMOVr0,#0ADDsp,sp,#4LDMFDsp!,r0-r4,r12,lrSUBSpc,lr,#4ENDP; with_irqIRQHandler PROCSTMF
142、D sp!,r4,lrMOVr4,#0x80000000LDRr0,r4,#0CMPr0,#1BLEQC_int_handlerMOVr0,#0STRr0,r4,#4LDMFD sp!,r4,pcENDP嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMReentrant Interrupt HandlersqThe steps needed to safely re-enable interrupts in an IRQ handler are:1. Construct return address and save on the IRQ stack.2. Save the w
143、ork registers and spsr_IRQ.3. Clear the source of the interrupt.4. Switch to System mode and re-enable interrupts.5. Save User mode link register and non callee-saved registers.6. Call the C interrupt handler function.7. When the C interrupt handler returns, restore User mode registers and disable i
144、nterrupts.8. Switch to IRQ mode, disabling interrupts.9. Restore work registers and spsr_IRQ.10. Return from the IRQ.嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMReentrant Example AREA INTERRUPT, CODE, READONLY IMPORT C_irq_handlerIRQ SUBlr,lr,#4; construct the return address STMFDsp!,lr; and push the adjusted l
145、r_IRQ MRSr14,SPSR; copy spsr_IRQ to r14 STMFDsp!, r12,r14; save work regs and spsr_IRQ; Add instruction to clear the interrupt here ; then re-enable interrupts. MSRCPSR_c,#0x1F; switch to SYS mode, FIQ and IRQ enabled.; USR mode registers are now current. STMFDsp!, r0-r3, lr; save lr_USR and non-cal
146、lee saved registers BLC_irq_handler; branch to C IRQ handler. LDMFDsp!,r0-r3, lr; restore registers MSRCPSR_c,#0x92; switch to IRQ mode and disable IRQs. FIQ is still enabled. LDMFDsp!, r12,r14; restore work regs and spsr_IRQ MSRSPSR_cf,r14 LDMFDsp!,pc; return from IRQ. END嵌入式系统架构软体设计嵌入式系统架构软体设计-usi
147、ng ARM嵌入式系统架构软体设计 -using ARMModule #4-3: Build ARM ROM Image嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMSystem StartupLoad code from address 0x0 to execute SVC mode Interrupts disable ARM stateSystem initialization1. Initialing the execution environment, i. e. exception vectors, stacks, memory system, I/O, etc.
148、2. Initializing the C library and application (C variables for example).Exception嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMSystem Memory MappingqROM at 0x0SimpleSlow to handle exceptionsqRAM at 0x0ComplexFast to handle exceptions嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMGeneral Process for Remap1.Power on to fetch the
149、RESET vector at 0x0 (from the aliased copy of ROM).2.Execute the RESET vector:3.LDR PC, =0x0C0000044.This causes a jump to the real address of the next ROM instruction3.Write to the REMAP register and set REMAP = 1.4.Complete the rest of the initialization code as described in Initializing the syste
150、m.嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMInitialize SystemqReset vector is at 0x0qInitialization process = Reset handler, to Set up exception vectorsInitialize the memory systemInitialize the stack pointer registersInitialize any critical I/O devicesChange processor mode if necessaryChange processor state
151、if necessary嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMSet up Exception VectorsqIf ROM at address 0x0Vectors consist of a sequence of hard-coded instructions to branch to the handlers.qIf ROM at elsewhereDynamically initialize the vectors by initialization codes.Typically, copy the vector table from ROM to RAM
152、嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMExample to Set up Exception VectorsENTRYLDR PC, Reset_AddrLDR PC, Undefined_AddrLDR PC, SWI_AddrLDR PC, Prefetch_AddrLDR PC, Abort_AddrNOP; Reserved vectorLDR PC, IRQ_AddrLDR PC, FIQ_Addr IMPORT Reset_Handler; In init.sIMPORT IRQ_Handler; In init.sReset_Addr DCDReset_
153、HandlerUndefined_AddrDCDReset_HandlerSWI_AddrDCDReset_HandlerPrefetch_AddrDCDReset_HandlerAbort_AddrDCDReset_HandlerDCD0; Reserved vectorIRQ_AddrDCDIRQ_HandlerFIQ_AddrDCDFIQ_Handler; *; Exception Handlers; *Undefined_Handler B Undefined_HandlerSWI_Handler B SWI_HandlerPrefetch_Handler B Prefetch_Han
154、dler Abort_handler B Abort_handler; IRQ_Handler; B IRQ_HandlerFIQ_Handler B FIQ_Handler END嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMInitialize The Stack Pointer RegistersqSp_SVCMust always be initialized.qSp_ IRQInitialize it if IRQ interrupt used.Initialize before interrupts are enabled.qSp_FIQInitialize it
155、 if FIQ interrupt used.Initialize before interrupts are enabled.qSp_ABTInitialize for Data and Prefetch Abort handlingqSp_UNDInitialize for Undefined Instruction handling.Initialize sp_ABT and sp_UND for debugging purposes.qSet up the stack pointer sp_USR when changing to User mode to start executin
156、g the application嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMChange Processor Mode & StateMode_USREQU0x10Mode_ FIQ EQU0x11Mode_IRQEQU0x12Mode_SVCEQU0x13Mode_ABTEQU0x17Mode_UNDEFEQU0x1BMode_UNDEFEQU0x1F;MSRCPSR_c, #Mode_IRQ:OR:I_Bit:ORF_Bitq Mode bitsSpecify the processor mode 1,0000User 1,0001FIQ 1,0010IRQ 1,00
157、11SVC 1,0111Abort 1,1011Undef1,1111System嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMExample to Initialize The Stack Pointer RegistersMode_IRQEQU0x12I_BitEUU0x80F_BitEQU0x40RAM_LimitEQU0x1000000;For 16MByte SDRAMSVC_StackEQURAM_LimitIRQ_StackEQURAM_Limit-1024.; -Initialize stack pointer register; Enter IRQ mode
158、 and set up the IRQ stack pointerMSR CPSR_c, #Mode_RQ:OR:I_Bit:OR:F_BitLDR SP, =IRQ_Stack嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMScatter LoadingqEnable us to specify the memory map of an image armlink.qFor more information Refer to:ARM Developer Suite Version 1.2 Linker and Utilities Guide嵌入式系统架构软体设计嵌入式系统架构
159、软体设计-using ARMExample of Scatter Loading ScriptROM_LOAD 0x0 ROM_EXEC 0x0 vectors.o (Vect, +First) * (+RO)RAM 0x28000000 * (+RW, +ZI)HEAP +0 UNINIT heap.o (+ZI) STACKS 0x28080000 UNINIT stack.o (+ZI)UART0 0x16000000 UNINIT uart.o (+ZI) All other read only code is placed after vector.oContain RW and Z
160、I data regionsHeap grows from this addressStack grows downward from this address嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMExample of Scatter Loading Script ROM/RAM RemapFLASH 0x24000000 0x4000000 FLASH 0x24000000 0x4000000 init.o (init, +First) * (+RO)32bitRAM 0x0000 vectors.o (Vect, +First) * (+RW,+ZI)HEAP +
161、0 UNINIT heap.o (+ZI) STACKS 0x40000 UNINIT stack.o (+ZI)UART0 0x16000000 UNINIT uart.o (+ZI)嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMInitialize ApplicationqInitialize nonzero writable data by copying the initializing values (RW from ROM to ROM) to the writable data regionqSet all writable data of ZI region
162、to zero.qWhen the compiler compiles a function called main(), it generates a reference to the symbol_main to force the linker to include the basic C run-time system from the ANSI C library.(The symbol _main is marked as an entry point.)嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARM_user_initial_stackhesap()In /Re
163、target.c_value_in_regs struct_initial_stackheap_user_initial_stackheap(unsigned R0, unsigned SP, unsigned R2, unsigned SL)struct_initial_stackheap config; config.heap_base = 0x00060000;config.stack_base = SP;return config;嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARM练习：练习： Build & Trace a ROM ImageqTry exampleem
164、beddedembedembed.mcpqBuilding an image by ADSqTrace code by AXD嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMCase Study:Build an image for Wiscore EVMqApplication:7-segment LED testSet up Timer 0: Interrupt to flash LED 0While loop detect switch & change 7-segment LED number嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMS3C4510
165、B Initial Memory MapFigure4-2 Initial System Memory Map (After Reset)嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMS3C4510B Special Register BaseqSYSCFG register determines:Start address of the System Managers special registersStart address of internal SRAM.(The total special register space in the system memory m
166、ap is fixed at 64 K bytes.)15:6 Internal SRAM base pointerThis 10-bit address becomes the upper address of SRAM.A25 through A16, the remaining SRAM address, and A15 through A0, are filled with zeros.25:16 Special register bank base pointerThe resolution of this value is 64K. Therefore, to replace th
167、e start address at 1800000H (24M), use this formula: Setting value = (1800000H/64K)16.嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMNET-Start! EVM Memory MappingFigure 3-1 NET-Start! Memory MapFigure 3-2 Memory Usage嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARM嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMGPIO AssignmentsThe GPIO_IN1 is us
168、ed by the bootstrap loader. Selecting the ON position will force the bootstrap loader to run in the diagnostic mode. Otherwise, the embedded Linux will be booted up after system power on.Figure 2-8 NET-Start! GPIO assignmentNote:嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMS3C4510B Special Registers for I/O Port
169、Figure 12-1. I/O Port Function Diagram嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMS3C4510B IOPMOD嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMS3C4510B IOPCON嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMS3C4510B IOPDATAFigure 12-4. I/O Port Data Register (IOPDATA)嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMExample Code to Control LED#define SYS_BASE
170、0x03ff0000#define IOPMOD(volatile unsigned*)(SYS_BASE + 0x5000)#define IOPCON(volatile unsigned*)(SYS_BASE + 0x5004)#define IOPDATA(volatile unsigned*)(SYS_BASE + 0x5008)#define GPIO_LED00x00010000#define GPIO_LED10x00020000void SetLED (int n, int on)int ctr = GPIO_LED0, GPIO_LED1;if (0 = n & n size
171、of(ctrl) / sizeof(int)*IOPDATA = on? (*IOPDATA | ctrn) : (*IOPDATA & ctrln);嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMS3C4510B Timer嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMS3C4510B Special Register TMOD嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMS3C4510B Special Register TDATATIMER DATA REGISTERSThe timer data registers, TDATA0
172、and TDATA1, contain a value that specifies the time-out duration for each timer. The formula for calculating the time-out duration is: (Timer data +1) cycles.嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMS3C4510B Special Register TCNTTIMER COUNT REGISTERSThe timer count registers, TCN0 and TCNT1, contain the curr
173、ent timer 0 and 1 count value, respectively, during normal operation.嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMExample Code to Control Timer#define TMOD*(volatile unsigned*)(SYS_BASE + 0x6000)#define TDATA0*(volatile unsigned*)(SYS_BASE + 0x6004)void Init_Timer()TDATA0 = 0x17D7840/MCLK/25MTMOD = 0x1;/enable t
174、imer0 at interval mode嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMS3C4510B Interrupt Controller嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMS3C4510B Special Register INTMOD嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMS3C4510B Special Register INTPNDINTERRUPT PENDING REGISTERThe interrupt pending register. INTPND contains interrupt pendi
175、ng bits for each interrupt source. This register has to be cleared at the top of an interrupt service routine.嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMS3C4510B Special Register INTMSK嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMS3C4510B Special Register INTOFFSETqINTERRUPT OFFSET REGISTERThe interrupt offset register, IN
176、TOFFSET, contains the interrupt offset address of the interrupt, which has the highest priority among the pending interrupts.The content of the interrupt offset address is “bit position value of the interrupt source 2=21=Total interrupt嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMExample Code for Timer0 Interrup
177、t ControlTimer0 IRQINTOFFSET = 0b101000r2 = 0b1010002 = 0b1010 = 10#define INTMOD*(volatile unsigned*)(SYS_BASE + 0x4000)#define INTPND*(volatile unsigned*)(SYS_BASE + 0x4004)#define INTMSK*(volatile unsigned*)(SYS_BASE + 0x4008)#define INTOFFSET*(volatile unsigned*)(SYS_BASE + 0x4024) void interrup
178、t_InitMask()INTMSK = 0x1FFBFF;/ enable Timer0 interruptINTPND = 0x0;lrq handler.sSTMFDsp!, r1-r3LDRr3, =INTOFFSETLDRr2,r3MOVr2,r2,LSR#2MOVr1,#0x1MOVr1,r1,LSL r2LDRr3,=INTPNDSTRr1,r3LDMFDsp!,r1-r3嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMUse Net-Start! BootloaderqCommands:HELP-helpUNIT Set access unitDUMP Memo
179、ry dumpCOPY- Memory copyFILL Fill memoryPOKE Poke memoryPEEK Peek memoryTX Send XMODEM fileRX Receive XMODEM fileGO Execute binaryINFO Print system informationSWITCH Switch modeqLoad image:Select SW2 to OFF positionPress RESET buttonTerminal set: bound rate 19200,8N1RUNrx 0x10000RUNcopy 0x10000 0x20
180、000 0x1810000RUNgo 0x1810000 嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARM练习：练习： Timer 2q根据前面的CASE，增加Timer 2功能， 让Timer 2 控制另一颗LED.嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMReferenceqARM Developer Suite Version 1.2 Developer GuideqARM Developer Suite Version 1.2 Linker and Utilities GuideqWiscore Net! Start user GuideqSAMSUNG S3C4510B User Manual
