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1、 8-bit 8位Microcontrollers 微处理器Application Note 应用注释 AVR1000: Getting Started Writing C-code for XMEGAAVR1000 ： XMEGA的C语言代码编写入门 Features 特点： Naming conventions 命名约定- Register names 寄存器名- Bit names 位名 C-code names C-代码名- Bit and group masks 位与组掩码- Group configuration masks 组配置掩码 Methods for accessing
2、registers 访问寄存器的方法 Methods for writing reusable module functions 可多次使用模块功能的写入方法1 Introduction 引言Short development times and high quality requirements on electronic products has made high-level programming languages a requirement. The main reason is that High level languages make it easier to maintai
3、n and reuse code due to better portability and readability. 由于电子产品的开发时间短，质量要求高，因此需要高层次的编程语言。最主要的原因是，高级语言具有更好的可移植性和可读性，使其更易于维护和重复使用代码。The choice of programming language alone does not ensure high readability and reusability; good coding style does. Therefore the XMEGA peripherals, header files and dr
4、ivers are designed with this in mind. 编程语言的选择本身并非是能确保具有较高的可读性和可重复使用性的唯一条件，还必须有良好的编码风格。因此 XMEGA 的外围设备，头文件和驱动程序的设计都是基于这方面考虑的。 The most widely used high-level language for AVR microcontrollers is C, and this application note therefore focuses on C programming. To support most of the AVR C compilers tha
5、t are available, the code examples are as far as possible written in ANSI C. A few examples are specific to IAR Embedded Workbench, but the ideas and methods can be used for other compilers with minor changes. IAR specific examples are clearly marked.AVR 微控制器使用的最广泛的高级语言就是 C 语言，因此本应用注释的重点是 C 语言编程。为了支
6、持大多数可用的 AVR C 语言编译器，我们尽可能把代码示例编写在 ANSI C 语言的规范中。有些例子是 IAR Embedded Workbench 专用的，但其思路和方法可用于与其他变化不大的编译器。 IAR 专用的示例都有清晰的标示。2 XMEGA Modules XMEGA 模块An AVR XMEGA is composed of several building blocks: An AVR CPU core, SRAM, Flash, EEPROM and a number of peripheral modules. These building blocks are cal
7、led “module types”. An XMEGA can have one or more instances of a given module type. All instances of a module type have the same features and functions. 一个 AVR XMEGA 由数个结构块组成：一个AVR CPU 芯片，一个 SRAM，一个闪存， 一个 EEPROM 以及若干外设模块。这些结构块被称为“模块类型”。XMEGA可以有一个或多个给定模块类型的实例。一个模块类型的所有实例都具有相同的特性和功能。Some module types
8、can be a subset of other module types. These inherit a subset of the features (and registers) of the super type, all inherited features are fully compatible. This applies to e.g. timers and IO ports. The subset of a module type can for a timer mean that it has fewer compare and capture channels than
9、 a full timer module. Similarly, an IO port may have less than eight pins. 有些模块类型可以是其他模块类型的子集。这些（模块类型）继承了特大模块类型的某个子集的特征（和寄存器），其继承的所有特征都完全兼容。这适用于比如计时器和IO端口。用于计时器的模块类型的子集可能意味着它所能得到的比较和捕获通道比完整的计时器模块的要少。同样，一个 IO 端口的管脚可能不足八个。A module type can be a “USART”, while the module instance is e.g. “USARTC0”, whe
10、re the “C0” suffix indicates the instance is “USART number 0 on port C”. For simplicity, a module instance will be referred to as a module throughout this document, unless there is a need to differentiate. 一个模块类型可以是“USART”的，如果这个模块实例比如是“USARTC0”，其中的“C0”后缀表示这个实例是“端口 C 上的 USART 编号为 0”。为了简单起见，一个模块实例将被称为
11、这整个文件中的一个模块，除非是有必要另作区分。Each module has a number of registers that contain control or status bits. All modules of a given type contain the same set (or subset) of registers, and all these registers contain the same set (or subset) of control and status bits. 每个模块都有若干寄存器，这些寄存器都包含控制位或状态位。一个给定类型的所有模块都包含
12、相同的寄存器集合（或子集），并且所有这些寄存器包含相同的控制位和状态位的集合（或子集） 。Figure 2-1. Module types, instances, registers and bits. 图2-1. 模块类型，实例，寄存器和位Each module has a fixed base address in the IO memory map and all registers contained in the module have fixed offset addresses relative to the module base address. This way each
13、register will not only have an absolute address in the IO memory space, but also a relative address defined by its offset. The register offset addresses are equal for all instances of a module type, simplifying the task of writing drivers that can be used for all modules of a specific type. 在 IO 内存图
14、里，每个模块都有一个固定的基础地址，并且该模块中的所有寄存器都有固定的偏移地址（这是相对于模块的基地址而言）。如此这样，每个寄存器不仅会在 IO 内存空间有一个绝对地址，而且还有一个根据其偏移量定义的相对地址。一个模块类型的所有实例中的寄存器偏移地址都是平等的，这样就简化了编写能够适用于某个特定类型的所有模块的驱动程序的任务。2.1 Register Naming Convention2.1. 寄存器命名约定Register are roughly speaking divided into control, status and data registers and the naming o
15、f registers reflect this. A general-purpose control register of the module is named CTRL. If multiple general-purpose control registers exists in a module they have a suffix character. In this case the control registers would be named CTRLA, CTRLB, CTRLC and so on. This also applies to STATUS regist
16、ers. 大致说来，寄存器有控制寄存器、状态寄存器和数据寄存器之分，这从寄存器的命名就可看出。模块的一个通用的控制寄存器被命名为CTRL。如果在一个模块中存在多个通用控制寄存器，他们都有一个后缀字符。在这种情况下，控制寄存器将被命名为CTRLA 、 CTRLB 、 CTRLC等。这方法也适用于状态寄存器。For registers that have a specific function the name reflects this functionality. For example, a control register that controls the interrupt level of a module is named INTCTRL. 对于具有特定
