VHDL-计数器程序

上传人:桔**** 文档编号:507010736 上传时间:2023-01-11 格式:DOC 页数:24 大小:39KB
返回 下载 相关 举报
VHDL-计数器程序_第1页
第1页 / 共24页
VHDL-计数器程序_第2页
第2页 / 共24页
VHDL-计数器程序_第3页
第3页 / 共24页
VHDL-计数器程序_第4页
第4页 / 共24页
VHDL-计数器程序_第5页
第5页 / 共24页
点击查看更多>>
资源描述

《VHDL-计数器程序》由会员分享,可在线阅读,更多相关《VHDL-计数器程序(24页珍藏版)》请在金锄头文库上搜索。

1、十五计数器liraryieee;use eee.std_loic_1164all;us iee.sd_logic_unsignd.all;EITYfivetenout SPOT(l,reet,nable : N dgic;coun : OUT sd_loi_vecto( downto 0);ENDfiveencout;ARHITECTUR coter OveencoutSIGNA unt_int:std_logc_vctor( to 3);BGINPRCES(clk,rest)BEGIWAIT UTI ising_edg(l);IF eset= HENun_int );ELSIF ale= 1

2、 THENIF(count_int=111) HENcount_in0000;SEcoutit = cot_int 1;-ELSE NUL ;-F (ou_int1001)HEN-contin=00;EDIF;ENDIF;END PROCSS;outu_int;- IF (ret0)then-q=0000;-ELSF(clkevent and clk=) TEN-=q 1;-(q=10) the-q00;-END I;-IF (reset=1)THE-q=0;-ELF-wa until(ckenta clk1);-WAI UTIL (clkVENT ADcl = );-ATNTI (lockE

3、NT ANDlck );- = 1;-end i;-out=q;- WAITUIL clck =1;-if (clckvn ad lk=1)hen-WAI UNTILrising_edg(cock);-lockevent clck=;-count =0;-WAT UNTIL (clokVENT ND clock 1);-WAI iseelk 1;-if (cockvent an lck=1) hen-WAIUNTIL isng_ede(cok);-cont =1;-WITNTIL (clockEVET AN clock = 1);-AIT UNTIL clock 1;-if (clokvent

4、an clok=1)hn-WAIT NT riig_edge(lock);-out=2;-en if;e if;-edf;- E PROCESS;ENDcuner;十四计数器lirar ieee;use ieetlogic_114.all;us iee.st_logic_usgnedal;ETITYfurtecout IORT(ck,ret,enae : Nstdlgic; cunt : OU_ogic_vctor( downto 0);ED fourteencout;ARCHITECTURE coutr OF orteencoutISGN count_nt:st_loc_vect(0 o 3

5、);EGINPOCES(cl,reset)GINAI I isig_dge(clk);Fres = 1 THEcountit (OER=0);ESIFeabl = HEIF(coun_int=101)THENcountit=000;LSEcount_t countin ;-EL NULL ;-I(cun_t=1001) T-count_in=0000;EN I;ND I;EN PROCESS;cou coun_it;- F (rest=0) then-0000;-LSIF(lkvetad ck=1)THN-q=q 1;-IF (q=1001)ten-q=0000;-ED I;-I (rst=1

6、)THEN-q=;-ELSIF-wait unt(clevet and cl=);-WAI NI(clkVENTAND lk = );- UTL (lockVENT ND lo );- q=q 1;-en f;-con=q;- WAUNTI clok1;-if (clocevntand lock=1)ten-WAIT UTIL riing_ede(clo);-clcvent andc=1;-cunt = ;-WAI UTIL (lokEET AND cock = 1);-WIT risedgecok =1;-if (clokventan lok) the- UTI risig_ge(lock)

7、;-ount= ;-WAITUNTI (cockEVENT ND ock = 1);-WAI UNIL lck = 1;-f (loceventaclck=1)thenIUNILrising_ede(coc);-count = ;-en i;-eif;-end if;- ND PROCESS;END cuntr;十三计数器librar iee;siee.stdlogic164ll;use ieee.slogc_unsin.all;ENTIY thirncut ISPOT(clk,reset,nable :IN st_logic; cun : OUTstd_oivcto(3 dn0);D ire

8、eencot;ACHETURcoterO ireteencot SSIGNAL countnt:std_loic_vecor(0 t 3);BEGIPRCS(ck,rse)BEGINWAITUNIL risng_edge(lk);I res = TENcount_it 0);LIFeabl = 1 THEIF(oun_int=110) Tcountit=0000;ELScotint= cunt_int 1;-ESE- NULL ;-IF(cn_i=1001)THEN-count_it00;END IF;ENDF;ED PROCES;cunt = count_n;- IF (res=0) hen

9、-q00;-LF(clkevn a clk=1) E-= 1;-IF(=1001)ten-q=0000;-D I;-IF (rst=1)THEN-q=0;-ELSIF-wait util (clkevent a clk=);IUNTIL (clkEENTND ck =);-WAIT NTL (clockEENT AN cloc=1);- q= 1;-ndi;-cout=q;-AIT NTIL cock= ;-if (clokent and cloc1)hen-WAT NTIL ising_edge(clck);-clocevet and lc1;-con = 0;-WAITUNIL (cloc

10、kEVEN Aclock = );-WAITrisedge clck 1;-if (loeent nd oc=) ten-WAIT UNL rising_dg(cock);-ont= 1;-WAIT UNTIL (clocEEN NDclock= );WIT UNT clk = 1;if(clckevent ad clock=1)th-WAI UTL ising_dg(clock);-coun 2;-end if;-ed if;end if; END PROESS;D coue;十二计数器lbary iee;se ieee.sd_logi_164l;use eet_logic_unsie.al

11、;NTITY twelvec ISPOT(clk,reet,enabe : IN std_oic; unt: OU sd_logicor(3 owto 0));END wevecut;ARCHITECTURcounter F twevecout ISSGAL cout_nt:std_locvcr(0 o );BGIPOCESS(clk,reet)BEGINWI UTLsingdge(lk);I rest 1THENcout_nt );LSIF enale = 1 HENI(counint1011) THENouint0000;ELSEcount_in=count_nt;-ELSE-NLL ;-F (cout_i

展开阅读全文
相关资源
相关搜索

当前位置:首页 > 办公文档 > 解决方案

电脑版 |金锄头文库版权所有
经营许可证:蜀ICP备13022795号 | 川公网安备 51140202000112号