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1、Multi-tier Data Access and Hierarchical Memory Design: Performance Modeling and AnalysisMarwan SleimanPHD DissertationDepartment of computer Science and EngineeringUniversity of ConnecticutStorrs, CT 06269-2115E-mail: marwanengr.uconn.eduMajor advisor: Dr. Lester LipskyAssociate advisors:Dr. Reda Am
2、marDr. Swapna GokhaleDr. Chun-Hsi Huang08/24/2007Multi-tier Data Access and Hierarchical Memory Design: Performance Modeling and AnalysisA DISSERTATIONSUBMITTED TO THE DEPARTMENT OF COMPUTER SCIANCE AND ENGINEERINGAND THE COMMITTEE ON GRADUATE STUDIES OF UNIVERSITY OF CONNECTICUTIN PARTIAL FULFILLME
3、NT OF THE REQUIREMENTS FOR THE DEGREE OFDOCTORAL OF PHILOSPPHYMarwan Sleiman 2007 Copyright by Marwan Sleiman 2007All Rights ReservedAPPROVAL PAGEDoctor of Philosophy DissertationMulti-tier Data Access and Hierarchical Memory Design: Performance Modeling and AnalysisPresented by:Marwan SleimanMajor
4、Advisor: _ Lester LipskyAssociate Advisor: _ Reda AmmarAssociate Advisor: _ Swapna GokhaleAssociate Advisor: _ Chun-Hsi HuangUniversity of Connecticut2007ABSTRACT In modern computing environment, memory hierarchy expands from CPU registers, high speed caches and local memory to middle-tier, network
5、storage, web cashing, internet storage, and active networks. As the gap between processor and memory speed is growing exponentially, it becomes more important to develop an analytical model to capture all these hierarchical levels and optimize system performance by optimizing the memory access time
6、to make a good utilization of both CPU and memory. A goal of a computer architect is to design a memory hierarchy that minimizes the response time of his system and maintain a minimal cost. This requires deciding on the number, speed and size of the hierarchical layers. In this work we study the per
7、formance of systems with multi-level hierarchical memories by studying the memory hit ratios, mean and variance of the access time, and other statistical and performance aspects and metrics of the access time,which helps the designer optimize the cost and response of the hierarchical memory system.
8、We use a Markov-chain model to represent the hierarchical memory, find the distribution of the memory access time, and to evaluate different performance objective functions. We study the different performance measures of the access time and we show their behavior when increasing the number and size
9、of intermediate memory levels while maintaining a constant cost. We show that, under reasonable assumptions for the values of the parameters involved in the memory levels, the response-time for a long hierarchical memory system approaches the power-tailed behavior as the number of memory levels incr
10、ease. Our model differs from all the previous related work by being global and general and by using some probabilistic equations that show the interdependence between the different levels and by using the P-K formula to distinguish between the memory access time and queuing time; it is independent o
11、f the application using the memory while classical approaches were program dependent. Moreover, our model achieves higher levels of accuracy while being expandable to multiple architectures and applications. Furthermore, we study and test the different quality measures that may affect the performanc
12、e of a hierarchical memory. These measures include, but are not limited to, mean of the memory access time, its variance and the probability of exceeding a given threshold (delay) time in addition to the ratio of the lag between the target time and actual time to the variance. We focus on the hit ra
13、tio at the different memory levels and the interdependence of the hit ratios between the different levels. By modifying the formula we use for the probability of finding data at each level, our model can cover all locality and working set architectures. We finally suggest an approximation function t
14、o our different objective functions and give some examples of systems that have been optimized using different techniques like local search, Lagrange Multipliers method, and on-linear optimal control.ACKNOWLEDGMENTS I wish to thank my major advisor, my associate advisors, my mentor, and my family for their patience, understanding, encouragement, help and support in preparing my dissertation. My major advisor had a great influence on my analytical thinking. He is a great researcher and an excellent advisor. He thought me how to think of any engineering and sci
