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1、EDA程序填空1、下面程序是参数可定制带计数使能异步复位计数器的VHDL描述，试补充完整。- N-bit Up Counter with Load, Count Enable, and- Asynchronous Resetlibrary ieee;use IEEE.std_logic_1164.all;use IEEE.std_logic_unsigned.all;use IEEE.std_logic_arith.all;entity counter_n isgeneric (width : integer := 8);port(data : in std_logic_vector (wid
2、th-1 downto 0);load, en, clk, rst : in std_logic;q : out std_logic_vector (width - 1 downto 0);end counter_n;architecture behave of counter_n issignal count : std_logic_vector (width-1 downto 0);beginprocess(clk, rst)beginif rst = 1 thencount 0); 清零elsif clkevent and clk = 1 then 边沿检测if load = 1 the
3、ncount = data;elsif en = 1 thencount = count + 1;end if;end if;end process;q 10 THENQ1 0);- 置零ELSEQ1 = Q1 + 1 ;- 加1END IF;END IF;END PROCESS ;Q = Q1;END bhv;3. 下面是一个多路选择器的VHDL描述，试补充完整。LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;ENTITY bmux ISPORT (sel : IN STD_LOGIC;A, B : IN STD_LOGIC_VECTOR(7 DOWNTO 0);Y: OUT STD_LOGIC_VECTOR(7 DOWNTO 0) ;END bmux;ARCHITECTURE bhv OF bmux ISBEGINy = A when sel = 1 ELSE B;END bhv;
