基于MIPI-DPI规范的液晶显示驱动接口设计Ø TFT-LCDTFT-LCD驱动原理驱动原理Ø MIPI_DP_specificationMIPI_DP_specificationØ 设计与仿真设计与仿真 TFT-LCD驱动原理驱动原理uTFT-LCDTFT-LCD结构示意图结构示意图 uTFT-LCDTFT-LCD显示驱动原理显示驱动原理 uTFT-LCDTFT-LCD矩阵结构矩阵结构 MIPI_DPI_specificationMIPI_DPI_specificationuDisplay Architectures and Interface Constructions uDisplay Pixel Interface Interoperabilityl There are two types of electrical connections between the host processor and the display module.• Power Signals. Power is supplied from either the host processor or from a power management unit that is controlled by the host processor. • Interface Signals. Pixel data, commands, and control information are transferred between the host processor and display module using the interface signals.lThe host processor interface shall implement a 24-bit data width and accompanying control and timing signals, as specified in section 6. The host processor interface shall be capable of transferring data as 16-bit, 18-bit, or 24-bit words. uDPI Interface Signals and Power Connections lThe host processor shall support all control signals for Type 2, Type 3, and Type 4 display architectures as shown in Figure 5. SD and CM are required control signals for Type 4 compliant display modules only.l Host processors shall support all timing parameter sets described in section 10. If a display module supports a display resolution in section 10 then it shall support the timing parameters as described for that resolution. Both the host processor and display module may operate over a range of values that include the given timing parameters. uPower Supply Connections and Interface Signals uProgrammable Timing Parameters uInterface Electrical Characteristics uDPI Timing Parameter Examples uShutdown for Type 4 Architecture uColor Mode for Type 4 Architecture 设计与仿真设计与仿真u本设计基于本设计基于QuartusII的的FPGA设计工具通过编写设计工具通过编写verilog HDL程序实现程序实现DPI接口功能接口功能 。