Part Number System Change NoticeEffective from August 6, 2007, a more concise part numbering system is utilized byHynix with the intention of managing product line with more consistency.Devices developed after August 2007 and their respective products will be Refer tothe following pages for more details. ( Number with prefix ‘HY’ -> Old Part Number Decoder LinkPart Number with prefix ‘H’ -> New Part Number Decoder Link‘H’ Part Number Last Updated: Dec. 2007NAND Flash PART NUMBERINGH 2 7 X X X X X X X X X - X X (1) HYNIX(1)(2)(3)(4)(5)(6)(7)(8)(9)(10) (11) (12)(13)(14)(15)(15) OPERATIONTEMPERATURE(2) PRODUCT FAMILY2 : FlashC: Commercial (0℃~70℃)E: Extended (-25℃~85℃)M : Mobile (-30℃~85℃) I(3) PRODUCT MODE7 : NAND FlashB: Industrial (-40℃~85℃)(14) BAD BLOCK: Included Bad Block(4) POWER SUPPLY(VCC)U: 2.7V~3.6VS: 1~5 Bad Block Included P: All Good BlockLS: 2.7V : 1.8V(13) - d“ - ” (5), (6) DENSITY64 : 64Mb12: 128Mb(12) PACKAGE MATERIAL25 : 256Mb 1G : 1Gb 4G : 4Gb AG : 16Gb CG : 64Gb51: 512Mb 2G : 2Gb 8G : 8Gb BG : 32Gb DG : 128GbA P L R: Wafer : Lead Free : Leaded : Lead Sequential Row Read Enable 2: 1 nCE Sequential Row Read Disable 4: 2 nCE Sequential Row Read Enable 5: 2 nCE Sequential Row Read Disable D: Dual Interface; Sequential Row Read Disable F: 4 nCE Sequential Row Read Disable‘HY’ Part Number Last Updated: Dec. 2007NAND Flash PART NUMBERINGHY XX X X XX XX X X - X (X) (X) (X) (X)(1)(1) HYNIX MEMORY(2) COMPONENT GROUP27: NAND Flash(3) POWER SUPPLY(VCC)(2)(3)(4)(5)(6)(7)(8)(9)(10)(11)(12)(13)(13) OPTION(CUSTOMER)Customer InitialOption(12) BAD BLOCKU: 2.7V~3.6VBlank: Wafer B: Included Bad Block L S: 2.7V : 1.8VS P: 1~5 Bad Block : All Good Block(4) CLASSIFICATION(11) OPERATING TEMPERATURESAB F GH: SLC + Single Die + S/B : SLC + Double Die + S/B : SLC + Quadruple Die + S/B : SLC + Single Die + L/B : SLC + Double Die + L/B : SLC + Quadruple Die + L/BBlank C E M I: Wafer, Chip: 0℃~70℃: -25℃~85℃: -30℃~85℃: -40℃~85℃KT: SLC + DSP + L/B : MLC + Single Die + L/B(10) PACKAGE MATERIALU V W: MLC + Double Die + L/B : MLC + Quadruple Die + L/B : MLC + DSP + L/BBlank P H R: Normal, Wafer, Chip, KGD : Lead Free : Halogen Free : Lead Sequential Row Read Enable 2: 1 nCE Sequential Row Read Disable 4: 2 nCE Sequential Row Read Enable 5: 2 nCE Sequential Row Read Disable 6: 1 nCE Sequential Row Read Enable Sequential Row Read Enable Sequential Row Read Disable Sequential Row Read Disable Sequential Row Read Disable F: 4 nCE Sequential Row Read Disable T: 3 nCE Sequential Row Read DisableM A B C 1 2C K D: Chip : KGD : PGD2(8) VERSION: 1st Gen.: 2nd Gen. : 3rd Gen. : 4th Gen.: Down Density(1st): Down Density(2nd)。