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1、BBBB ADDRESSREGISTER BBBBBBBB REGISTER INDEX B D01 2 3 4 5 6 7 89 10 11 12 13 14 15 16 D1 D2 D3 GND CLK1 CLK2 SYNCPOC TEST CM ROM VDD CM RAM3 CM RAM2 CM RAM1 CM RAM 0 PIN CONFIGURATION GATE PROTECTION TO OR FROM PAD GND VDD = = REFRESH COUNTER REFRESH COUNTER ADDRESS REGISTER4004 EFFECTIVE ADDRESS C
2、OUNTER Re-drawn schematics based on Revision G of the original Intel 4004 schematics by Intel Corporation (August 6, 1976). Schematic capture and design verification by Fred Huettig, Brian Silverman and Barry Silverman (February 2, 2006). - You are free: Under the following conditions: * to make der
3、ivative works * to copy, distribute, display, and perform this work Attribution. You must attribute the work in the manner specified by the author or licensor. Noncommercial. You may not use this work for commercial purposes. Share Alike. If you alter, transform, or build upon this work, you may dis
4、tribute the resulting work only under a license identical to this one. * For any reuse or distribution, you must make clear to others the license terms of this work. * Any of these conditions can be waived if you get permission from the copyright holder. Your fair use and other rights are in no way
5、affected by the above. This is a human-readable summary of the Legal Code (the full license) available at: http:/creativecommons.org/licenses/by-nc-sa/2.5/legalcode Intel is a registered trademark of the Intel Corporation INCREMENTER AND INDEX REGISTER Sheet 1 of 3 O2 O1 O2&SCA12+M12 POC&O2&SCA32+X1
6、2 RRAB0 RRAB1 D0 INCREMENTER INHX11+X31O1 O2 O1 SC&M22&O2 SCA22+M22O2 SC&A22 FIN&X12 INH&X32&O2 VDD D3 D2 D1 O1 WRAB0 WRAB1 O1 SC&A12&O2 X32 X12 WADB2 RADB2 WADB1 RADB1 WADB0 RADB0 POC&O2X12+X32INH DCJIN+FINO1M11+X21INH M12+M22+O1M11+M12 A12 A22 A32 O2JMS&DC&M22+BBLM22+X12+X22 O1 Re-drawn schematics
7、 based on Revision G of the original Intel 4004 schematics by Intel Corporation (August 6, 1976). Schematic capture and design verification by Fred Huettig, Brian Silverman and Barry Silverman (February 2, 2006). - You are free: Under the following conditions: * to make derivative works * to copy, d
8、istribute, display, and perform this work Attribution. You must attribute the work in the manner specified by the author or licensor. Noncommercial. You may not use this work for commercial purposes. Share Alike. If you alter, transform, or build upon this work, you may distribute the resulting work
9、 only under a license identical to this one. * For any reuse or distribution, you must make clear to others the license terms of this work. * Any of these conditions can be waived if you get permission from the copyright holder. Your fair use and other rights are in no way affected by the above. Thi
10、s is a human-readable summary of the Legal Code (the full license) available at: http:/creativecommons.org/licenses/by-nc-sa/2.5/legalcode Intel is a registered trademark of the Intel Corporation TO ADDER / ACCUMULATOR CONTROL MEMORY CONTROL ADDRESS Sheet 2 of 3 TEST O1 O2 M22 WRAB1 X32 SC INC+ISZ+X
11、CH FIN+FIM+SRC+JIN SC M12 WRAB0 JIN+FIN JUN+JMS JCN+ISE CN INH INH POC A22 A32 X12 SC&M22&O2 FIM+SRCIOOPE DCJIN+FINO1M11+X21INH A12 FIN+FIM OPE I/O D3 D0 OPA_REGISTER OPR_REGISTER L CONDITION_F/F SINGLE_CYCLE_F/F RADB0 SCA22+M22O2 O2JMS&DC&M22+BBLM22+X12+X22 POC&O2X12+X32INH INH&X32&O2 INHX11+X31O1
12、O2&SCA12+M12 POC&O2&SCA32+X12 FIN&X12 SC&A22 SC&A12&O2 IOR JUN+JMS INC+ISZ+ADD+SUB+XCH+LD INC/ISZ XCH X22 JMSBBL JCNISZ M12+M22+O1M11+M12 M12 IOW O2O1 RRAB0 RRAB1 RADB1 RADB2 ACC_0 CY_1 SRC KBP LDM/BBL X21&/O2 ADD 5 SUB LD 1 2 ADM CLB 3 CLC IAC 4 6 DAC CMC STC CMA RAL RAR DAA TCS O-IB DCL O1O2 WADB2
13、 WADB1 WADB0 OPA-IB TCC SBM ADD_0 D2 D1 BBBBB B B O I O I Re-drawn schematics based on Revision G of the original Intel 4004 schematics by Intel Corporation (August 6, 1976). Schematic capture and design verification by Fred Huettig, Brian Silverman and Barry Silverman (February 2, 2006). - You are
14、free: Under the following conditions: * to make derivative works * to copy, distribute, display, and perform this work Attribution. You must attribute the work in the manner specified by the author or licensor. Noncommercial. You may not use this work for commercial purposes. Share Alike. If you alt
15、er, transform, or build upon this work, you may distribute the resulting work only under a license identical to this one. * For any reuse or distribution, you must make clear to others the license terms of this work. * Any of these conditions can be waived if you get permission from the copyright holder. Your fair use and other rights are in no way affected by the above. This is a human-readable summary of the Legal Code (the full license) available at: http:/creativecommons.org/licenses/by-nc-sa/2.5/legalcode Intel is a registered trademark of the In
