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1、SOLUTIONS MANUAL OPERATING SYSTEMS: INTERNALS AND DESIGN PRINCIPLES FIFTH EDITION WILLIAM STALLINGS Copyright 2004: William Stallings -2- 2004 by William Stallings All rights reserved. No part of this document may be reproduced, in any form or by any means, or posted on the Internet, without permiss
2、ion in writing from the author. -3- NOTICE This manual contains solutions to all of the review questions and homework problems in Operating Systems, Fifth Edition. If you spot an error in a solution or in the wording of a problem, I would greatly appreciate it if you would forward the information vi
3、a email to me at . An errata sheet for this manual, if needed, is available at ftp:/ W.S. -4- TABLE OF CONTENTS Chapter 1:Computer System Overview5 Chapter 2:Operating System Overview11 Chapter 3:Process Description and Control.14 Chapter 4:Threads, SMP, and Microkernels.18 Chapter 5:Concurrency: Mu
4、tual Exclusion and Synchronization.21 Chapter 6:Concurrency: Deadlock and Starvation30 Chapter 7:Memory Management.38 Chapter 8:Virtual Memory43 Chapter 9:Uniprocessor Scheduling51 Chapter 10:Multiprocessor and Real-Time Scheduling62 Chapter 11:I/O Management and Disk Scheduling65 Chapter 12:File Ma
5、nagement71 Chapter 13:Networking.74 Chapter 14:Distributed Processing, Client/Server, and Clusters76 Chapter 15:Distributed Process Management79 Chapter 16:Security82 -5- A A A NSWERS TO NSWERS NSWERS TO TO QQ QUESTIONSUESTIONSUESTIONS 1.1 A main memory, which stores both data and instructions: an a
6、rithmetic and logic unit (ALU) capable of operating on binary data; a control unit, which interprets the instructions in memory and causes them to be executed; and input and output (I/O) equipment operated by the control unit. 1.2 User-visible registers: Enable the machine- or assembly-language prog
7、rammer to minimize main memory references by optimizing register use. For high-level languages, an optimizing compiler will attempt to make intelligent choices of which variables to assign to registers and which to main memory locations. Some high- level languages, such as C, allow the programmer to
8、 suggest to the compiler which variables should be held in registers. Control and status registers: Used by the processor to control the operation of the processor and by privileged, operating system routines to control the execution of programs. 1.3 These actions fall into four categories: Processo
9、r-memory: Data may be transferred from processor to memory or from memory to processor. Processor-I/O: Data may be transferred to or from a peripheral device by transferring between the processor and an I/O module. Data processing: The processor may perform some arithmetic or logic operation on data
10、. Control: An instruction may specify that the sequence of execution be altered. 1.4 An interrupt is a mechanism by which other modules (I/O, memory) may interrupt the normal sequencing of the processor. 1.5 Two approaches can be taken to dealing with multiple interrupts. The first is to disable int
11、errupts while an interrupt is being processed. A second approach is to define priorities for interrupts and to allow an interrupt of higher priority to cause a lower-priority interrupt handler to be interrupted. 1.6 The three key characteristics of memory are cost, capacity, and access time. 1.7 Cac
12、he memory is a memory that is smaller and faster than main memory and that is interposed between the processor and main memory. The cache acts as a buffer for recently used memory locations. 1.8 Programmed I/O: The processor issues an I/O command, on behalf of a process, to an I/O module; that proce
13、ss then busy-waits for the operation to be completed before proceeding. Interrupt-driven I/O: The processor issues an I/O command on behalf of a process, continues to execute subsequent instructions, and is interrupted by the I/O module when the latter has completed its work. The subsequent instruct
14、ions may be in the same process, if it is not necessary for that process to wait for the completion of the I/O. Otherwise, the process is suspended pending the interrupt and other work is performed. Direct memory access (DMA): A DMA CHAPTER 1 COMPUTER SYSTEM OVERVIEW -6- module controls the exchange
15、 of data between main memory and an I/O module. The processor sends a request for the transfer of a block of data to the DMA module and is interrupted only after the entire block has been transferred. 1.9 Spatial locality refers to the tendency of execution to involve a number of memory locations th
16、at are clustered. Temporal locality refers to the tendency for a processor to access memory locations that have been used recently. 1.10 Spatial locality is generally exploited by using larger cache blocks and by incorporating prefetching mechanisms (fetching items of anticipated use) into the cache control logic. Temporal locality is exploited by keeping recently used instruction and data values in cache memory and by exploiting a cache hierarchy.
