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1、Professional English in Computer Field,Chapter Two Computer Architecture,内容,正文 Computer Motherboard Memory Hierarchy in Cache-based Systems 阅读材料 Multi-core (computing) I2C,1 Computer Motherboard,Key Words,chassis n.底架 multitude n.许多 peripheral devices 外设 plurality n.多数 firmware n.固件 dedicated adj.专用
2、的 augment v.扩展, 增加 clamp n.夹钳 slot n.插槽 screw n.螺钉 inception n.初期，开端 riser n.竖板,Notes,Most personal computers also include a dedicated serial port, a dedicated keyboard port, and one or more expansion slots configured to receive expansion cards for augmenting the PCs functionality. In a typical comp
3、uter system, a motherboard is integrated with PCI slots to enable customers to plug different PCI cards into the computer for processing output signals.,很多个人计算机都包括了一个专门的串口、键盘口和 一个或者多个扩展插槽用于插接扩展卡来增强PC的功能。,在一个典型的计算机系统中，主板集成了PCI插槽使 得客户可以插入不同的PCI卡以处理输出信号。,Notes,The connection between the daughterboards
4、and the motherboards is generally intended to provide for the transmission of power, ground and electrical signals between the daughterboard and the motherboard.,扩展板和主板的连接部分通常用于在扩展板和主板 之间传输电能、接地信号和电信号。,2 Memory Hierarchy in Cache-based Systems,Cache Hierarchy,Cache Functionality and Organization,Cac
5、he Organization and Replacement Policies,Key Words,bottleneck n.瓶颈 fetch v.取，获得 amortize v.分摊，补偿 consecutively adv.连续地 latency n.延迟 metric n.衡量标准 uniform adj.不变 hierarchy n.分层结构 rule of thumb 单凭经验的方法,Key Words,quotient 商(数)，系数 swap space 交换 Translation Lookaside Buffer 转换查找表 modulo 以.为模 thrashing 颠簸
6、 set-associative cache 组关联缓存 fully associative cache 全关联缓存,Notes,The instruction cache regularly holds several other things, like branch prediction information. In certain cases, this cache can even perform some limited operation(s). The resultant value of the instruction is also stored in a registe
7、r. The register contents are then stored back into the data cache.,指令缓存经常保存一些其它的东西，例如程序分支预测信 息。在一些特定的例子中，这个缓存甚至可以执行一些有 限的操作。,作为指令执行结果的数值也被存入寄存器。寄存器的内 容于是存回数据缓存。,Notes,If an application does not make good use of the TLB， increasing the size of the page can be beneficial for performance, allowing for
8、a bigger part of the address space to be mapped into the TLB. And the larger, more complex, and more important any program is, the better are its chances that that itll be one of these old 32-bit programs.,如果应用程序没有充分利用TLB, 增加页面尺寸可以提高性能， 因为它允许更大的地址空间映射到TLB。,全关联缓存的设计解决了由于直接映射缓存所导致的潜在的 颠簸的问题。,Reading M
9、aterial 1 Multi-core (computing),Reading Material 2 I2C,Exercises,The _, which is a printed circuit board, is used to electrically connect many components of a computer together. A _ chip containing the systems startup program is also mounted to the motherboard. A motherboard typically includes inpu
10、t/output (I/O) connectors, floppy disk and hard disk drive connections, as well as circuitry for controlling any built-in peripheral devices e.g., _, _, and _. _ is the original open motherboard standard created by IBM for the first home computer, the IBM-PC. _ can operate to control the data access
11、 on both the rising and falling edges of the system clocks. _ time is increasingly the bottleneck in overall application performance of a computer system. With _, a cache allocates a line/block with a length that is a multiple of the cache line. For multiple levels of cache memory, the _ the level,
12、the father away the cache is from the CPU. _ and _ are two metrics associated with caches and memory. On a virtual memory system, memory extends to disk. Certain portions of the data and instructions can be temporarily stored on disk, in the _.,questions,What kinds of components does a computer syst
13、em include? Please list several common functional units on a motherboard of a computer. Give some examples of buses on a general motherboard. Whats the difference between SDRAM and DDR DRAM? What are the motherboard and daughter board used to? How does a simple Cache-Based Memory System work? Under what condition, the swap space will work? How? Please list several types of caches according to its functionality. Briefly describe three different kinds of cache organization. Please draw a figure of 2-level cache memory system with CPU and memory on it; mark the speed of these different levels.,
