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1、APPLICATION NOTE1. GATE DRIVE REQUIREMENTS OF HIGH-SIDE DEVICESThe gate drive requirements for a power MOSFET or IGBT uti-lized as a high side switch (drain connected to the high voltagerail, as shown in Figure 1) driven in full enhancement, i.e., lowestvoltage drop across its terminals, can be summ
2、arized as follows:1. Gate voltage must be 10-15V higher than thedrain voltage. Being a high side switch, suchgate voltage would have to be higher than therail voltage, which is frequently the highest volt-age available in the system.2. The gate voltage must be controllable from thelogic, which is no
3、rmally referenced to ground.Thus, the control signals have to be level-shiftedto the source of the high side power device,which, in most applications, swings between thetwo rails.3. The power absorbed by the gate drive circuitryshould not significantly affect the overall effi-ciency.With these const
4、raints in mind, several techniques are presentlyused to perform this function, as shown in principle in Table I.Each basic circuit can be implemented in a wide variety of con-figurations.International Rectifier 233 Kansas Street El Segundo CA 90245 USA HV Floating MOS-Gate Driver ICs (HEXFET is a tr
5、ademark of International Rectifier) How to provide a negative gate driveDriving Buck convertersDriving Dual-Forwards and switched reluctancemotor controllersCycle-by-cycle current control by means of the SDpinBrushless and induction motor drivesPush-pull and other low-side applicationsDriving a high
6、-side P-Channel MOSFETHow to drive thyristor gatesTroubleshooting guidelinesTopics Covered:Gate drive requirements of high side devicesBlock diagram of a typical MGDBootstrap operationHow to select the bootstrap componentsHow to calculate the power dissipation in the MGDHow to deal with negative tra
7、nsientsLayouts and other guidelinesHow to isolate the logic from the power circuitHow to boost the output current of an MGD to drivemodulesHow to provide a continuous gate driveGATESOURCEV+HIGH VOLTAGE RAILFigure 1. Power MOSFET in high 1AN978-b2 AN978aVDDHINSDLINVSSRSRSVDD/ VCCLEVELTRANSLATORAND P
8、WDISCRIMINATORPULSEGENERATORUVDETECTDELAYVDD/ VBSLEVELTRANSLATORPULSEDISCRIMINATORCd-subCb-subUVDETECTLATCHLOGICQQVBHOVSLO2COMMCBOOTVCCVRVDD/ VCCLEVELTRANSLATORAND PWDISCRIMINATORFigure 2. Block Diagram of the IR2110HIGH SIDECMOSLD MOS (LEVELSHIFTERS)p+n+ n+p-wellpn-pCb-subp+pn+n+n+pn-Cd-subp+p-COMF
9、igure 3. Silicon crossection showing the parasitic capacitances.International Rectifiers family of MOS-gate drivers (MGDs) integrate most of the functions required to drive one high side and one lowside power MOSFET or IGBT in a compact, high performance package. With the addition of few components,
10、 they provide very fastswitching speeds, as shown in Table II for the IR2110, and low power dissipation. They can operate on the bootstrap principle or with afloating power supply. Used in the bootstrap mode, they can operate in most applications from frequencies in the tens of Hz up tohundreds of k
11、Hz.2. A TYPICAL BLOCK DIAGRAMThe block diagram of the IR2110 will be used to illustrate the typical structure of most MGDs (Figure 2). It comprises a drive circuit fora ground referenced power transistor, another for a high side one, level translators and input logic 3AN978a2.1 Input logicBoth chan
12、nels are controlled by TTL/CMOS compatible inputs. The transition thresholds are different from device to device. SomeMGDs, (IR211x and IR215x) have the transition threshold proportional to the logic supply VDD(3 to 20V) and Schmitt trigger buffers withhysteresis equal to 10% of VDDto accept inputs
13、with long rise time. Other MGDs (IR210x, IR212x, IR213x) have a fixed transition from logic0 to logic 1 between 1.5 to 2 V. Some MGDs can drive only one high-side power device. Others can drive one high-side and one low-sidepower device. Others can drive a full three-phase bridge. It goes without sa
14、ying that any high-side driver can also drive a low side device.Those MGDs with two gate drive channel can have dual , hence independent, input commands or a single input command with comple-mentary drive and predetermined deadtime.Those application that require a minimum deadtime should use MGDs wi
15、th independent drive and relay on a few passive components tobuild a deadtime, as shown in Section 12. The propagation delay between input command and gate drive output is approximately the samefor both channels at turn-on (120ns) as well as turn-off (95ns) with a temperature dependence characterize
16、d in the data sheet. Theshutdown function is internally latched by a logic 1 signal and activates the turn off of both power devices.The first input command after the removal of the shutdown signal clears the latch and activates its channel. This latched shutdown lendsitself to a simple implementation of a cycle-by-cycle current control, as exemplified in Section 12. The signals from the input logic arecoupled to the
