Addressing mode Saylor(寻址模式塞勒)

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1、Addressing mode 1Addressing modeAddressing modes are an aspect of the instruction set architecture in most central processing unit (CPU) designs.The various addressing modes that are defined in a given instruction set architecture define how machine languageinstructions in that architecture identify

2、 the operand (or operands) of each instruction. An addressing mode specifieshow to calculate the effective memory address of an operand by using information held in registers and/or constantscontained within a machine instruction or elsewhere.In computer programming, addressing modes are primarily o

3、f interest to compiler writers and to those who writecode directly in assembly language.CaveatsNote that there is no generally accepted way of naming the various addressing modes. In particular, different authorsand computer manufacturers may give different names to the same addressing mode, or the

4、same names to differentaddressing modes. Furthermore, an addressing mode which, in one given architecture, is treated as a singleaddressing mode may represent functionality that, in another architecture, is covered by two or more addressingmodes. For example, some complex instruction set computer (C

5、ISC) computer architectures, such as the DigitalEquipment Corporation (DEC) VAX, treat registers and literal/immediate constants as just another addressing mode.Others, such as the IBM System/390 and most reduced instruction set computer (RISC) designs, encode thisinformation within the instruction.

6、 Thus, the latter machines have three distinct instruction codes for copying oneregister to another, copying a literal constant into a register, and copying the contents of a memory location into aregister, while the VAX has only a single MOV instruction.The term addressing mode is itself subject to

7、 different interpretations: either memory address calculation modeor operand accessing mode. Under the first interpretation instructions that do not read from memory or write tomemory (such as add literal to register) are considered not to have an addressing mode. The secondinterpretation allows for

8、 machines such as VAX which use operand mode bits to allow for a literal operand. Only thefirst interpretation applies to instructions such as load effective address.The addressing modes listed below are divided into code addressing and data addressing. Most computerarchitectures maintain this disti

9、nction, but there are, or have been, some architectures which allow (almost) alladdressing modes to be used in any context.The instructions shown below are purely representative in order to illustrate the addressing modes, and do notnecessarily reflect the mnemonics used by any particular computer.H

10、ow many addressing modes?Different computer architectures vary greatly as to the number of addressing modes they provide in hardware. Thereare some benefits to eliminating complex addressing modes and using only one or a few simpler addressing modes,even though it requires a few extra instructions,

11、and perhaps an extra register.1 It has proven much easier to designpipelined CPUs if the only addressing modes available are simple ones.Most RISC machines have only about five simple addressing modes, while CISC machines such as the DEC VAXsupermini have over a dozen addressing modes, some of which

12、 are quite complicated. The IBM System/360mainframe had only three addressing modes; a few more have been added for the System/390.When there are only a few addressing modes, the particular addressing mode required is usually encoded within the instruction code (e.g. IBM System/390, most RISC). But

13、when there are lots of addressing modes, a specific field is often set aside in the instruction to specify the addressing mode. The DEC VAX allowed multiple memory operands for almost all instructions, and so reserved the first few bits of each operand specifier to indicate the addressingAddressing

14、mode 2mode for that particular operand. Keeping the addressing mode specifier bits separate from the opcode operation bitsproduces an orthogonal instruction set.Even on a computer with many addressing modes, measurements of actual programs indicate that the simpleaddressing modes listed below accoun

15、t for some 90% or more of all addressing modes used. Since most suchmeasurements are based on code generated from high-level languages by compilers, this reflects to some extent thelimitations of the compilers being used. 2Useful side effectSome processors, such as Intel x86 and the IBM/390, have a

16、Load effective address instruction. This performs acalculation of the effective operand address, but instead of acting on that memory location, it loads the address thatwould have been accessed into a register. This can be useful when passing the address of an array element to asubroutine. It may also be a slightly sneaky way of doing more calculation than normal in one instruction; forexample, using such an instruction with the addressing mode base+index+offset (detaile

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