《lcm测试信号系统简介》由会员分享，可在线阅读，更多相关《lcm测试信号系统简介（23页珍藏版）》请在金锄头文库上搜索。
1、Testing Follow on LCM,What is the outline OLB process,LCD Panel,LCD Panel,Dual Edge,Single Edge,What is the Outline PCB process,Structure of TFT-LCD,What is purpose special test pattern,What is Specification of the Production Name : Type : Power : Signal Type : Resolution : Area : Cell Type :,14.1“,
2、 15”,17“,17.4”,18“,5v,3.3v,12v,LVDS,TTL,DVI,D_sub,SVGA,XGA,SXGA,SXGA+,UXGA,800x600,1024x768,1280x1024,1400x1050,1600x1200.,MVA , TN,Module,Monitor set,What purpose is on the testing Station,PCBI :Check some defect like PCBA Function After OLB & PCB bonding process .AAFC : After Assembly Function Che
3、ck which check some defects after assembly and adjust flicker on the LCMAging : Provide high temper 50C 4 hrs,Using the condition to test the reliability on the Panel.C ken : Final Check and judge the Grade on the panel they are base on PC Base Pattern Generator .,PC Base Pattern Generator,Base On P
4、ersonal Computer General Low Cost Pattern Edit and Program is easy,優點,Function Block of the PC Base P/G,PC,Control Panel Display Card,待測Panels Display Card,A/D D/A Card,Control Terminal,待測 Terminal,Power Board,Panel link 2 LVDS,Panel link to LVDS Function Block,Data Communications Type,TTL ( Transis
5、tor Transistor Logic )LVDS (Low Voltage Differential Signal)TMDS(Transition Minimized Differential signal),What is TMDS?,Transition Minimized Differential Signal introduction1.TMDS link is used to send graphic data too monitor. 2.Use 3 differential data pairs with timing and control data embeddedin
6、data transmission 3.Use low-swing differential voltage,TMDS Logical Architecture,Compress Rate :10 Times. Compress Method : Tx0:R0:7,Hsync,VsyncTx1:G7:0,CTL1,PLL_syncTx2:B7:0,CTL2,3,All of the Scheme on TMDS Field,What is LVDS?,The feature of LVDS 1.Differential Fan out 2.Low Swing Good For Design1.
7、Long Commutation Distance 2.Good noise defense3.Low Power consumption,Data Communications of LVDS,Compress Type Compress Rate : 7 times it is be TX0:R0R5,G0TX1:G1G5,B0,B1TX2:B2B5,H_snyc,V_snyc,DE .as 6 bit data transmitter TX0:R0R5,G0TX1:G1G5,B0,B1TX2:B2B5,H_snyc,V_snyc,DETX3:R6,R7,G6,G7,B6,B7,X .as
8、 8 bit data transmitter,What is EDID? Extend Display Identification Data Standard,Purpose It is build on VESA standard to define the Display filed.The Original EDID Structure definition from DDC Standard. Data format Vendor/Product Identification/EDID Version/Basic Display Parameters/Features/Establ
9、ished/Standard Timing/Detail Timing/Extension Flag/Checksum Data Communication Method Display card get Data for displaying by SM_Bus protocol What is improve on the LCM Testing Dept.,Timing List on VESA,Resolution & Refresh Rate,fH (水平更新頻率) : 重複顯示一條線Line的頻率fV (垂直更新頻率) or Frame rate : 重複顯示一畫面的頻率Dot c
10、lock : 重複顯示一點的頻率,The Structure of Display,How to Calculate the Dot Clock,Dot CLK= H_Total *V_Total * Frame Rate H_Total=HA + HFP + HSO + HBPV_Total=VA + VFP + VSO + VBPFrame Rate : Refresh rate,Detail Timing Define,How to Define the Color ability,Color Depth : The Capacity for showing on Screen by bit sizes.What is 6 bits/8 bits on Color Depth ?26*26*26=262144 Colors28*28*28=16777216 Colors,
