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1、1The Report of POC DesignMarch 29, 201121、Purpose1. The purpose of this project is to design and simulate a parallel output controller (POC) which acts an interface between system bus and printer. 2. The use of MaxPlus II for design and simulation.2、Taska. The physical model of POCPOC is one of the
2、most common I/O modules, namely the parallel output controller. It plays the role of an interface between the computer system bus and the peripheral (such as a printer or other output devices). Figure 1 Printer ConnectionFigure 1 shows the connecting of a printer to the system bus through the POC. T
3、he communication between POC and the printer is controlled by a “handshake” protocol illustrated in Figure 2. Figure 2 The handshake-timing diagram between POC and the printer3b. The logical model of POCThe handshaking process is described as follows: When the printer is ready to receive a character
4、, it holds RDY=1.The POC must then hold a character at PD (parallel data) port and produce a pulse at the terminal TR (transfer request). The printer will change RDY to 0, take the character at PD and hold the RDY at 0 until the character has been printed (e.g. 5 or 10ms), then set RDY=1 again when
5、it is ready to receive the next character. (Suppose the printer has only a one character “buffer” register, so that each character must be printed before the next character is sent).In order to ease your design work, the further explanations of the POC operations and some design hints are given as f
6、ollows: The buffer register BR is used to hold a character that has been sent via the system bus while that the character is being transferred to the printer. The status register SR is used for two control functions: SR7serves as a ready flag for system bus transfers to BR (like the printer RDY sign
7、al for transfers from POC to the printer), and SR0 is used to enable or disable interrupt requests from POC. If SR0=1, then POC will interrupt when it is ready to receive a character (i.e., when SR7=1). If SR0=0, then POC will not interrupt. The other bits of SR are not used and empty.The transfer o
8、f a character to POC via the system bus proceeds as follows. POC indicates that it is ready by setting SR7.The processor reads SR (by executing a polling or interrupt service routine) and, finding SR7=1, writes a character to BR. The POC clears SR7 when it loads this character into BR to indicate th
9、at another character should not be sent for the moment. POC then proceeds to transfer the character in BR to the printer by generating a pulse at TR. The processor, in the meantime, continues to fetch and execute instructions .If it should happen to read SR, it will find SR7=0 and hence will not att
10、empt to send another character to the printer. When the printer is ready to receive another character, POC sets SR7.The transfer cycle can now repeat. c. The overall connection of printer and POCThe overall connection graph as follows:4VCCclkINPUTVCCresetINPUTVCCcsINPUTVCCrwINPUTVCCchosINPUTVCCA20IN
11、PUTVCCD70INPUTirqOUTPUTpd70OUTPUTclktrresetrdyprinterinstclkcsrdyrwchosresetA20D70irqtrpd70pocinst5In this graph there are two main modules: printer and poc; Printer in this project is used as a time-delayer. POC contains the main program of this project.3、Simulation and ExplainMeaning of Symbols:cs
12、 - enable signal. clk - clock signal. rw - input signal of POC that is the control of reading datas from POC to CPU or writing datas from CPU to POC reset - input signal that resets the whole system. chos - input signal .when set as 0,represents the mode of inquiry ;when set as1, represents the mode
13、 of interrupt. D - 8 bits data signal from CPU to POC. A - 3 bits address signal from CPU to POC.”000”point to br.”001”point to br. pd - 8 bits signal from POC to Printer. rdy - input signal that is a printer ready message to POC. tr - a pulse signal to make the rdy be low-level. irq - Interrupt sig
14、nal from POC to CPU. 3.1 The simulation wave of POC module(without printer)a. inquiry mode5Here are the explanations of the simulation wave:1、 cs is the chip select signal which means when set 1, the chip is selected to work.2、 When reset=1 and here comes a positive edge of the clock, the whole syst
15、em resets. 3、The control signal chos =1 indicates that poc use the inquiry mode. 4、Here the A indicate the target. When A=”001” means the cpu selects sr register as the read or write target, when A=”000” means cpu selects the br. 5、In a inquiry , rw and A are singals from cpu to poc to control the a
16、ction of poc. rw=1 and A=001 write data from cpu(D) to poc(br). rw=1 and A=000 write status to update sr to set sr(7)=0. rw=1 and A=001 again write data from poc(br) to printer(pd). 6、The irq signal is always 0 because the control signal chos always equals 0, the block works in inquiry mode. 7、After sending datas to br and set sr to “00000000”, poc give a impulse in tr to make the
