最新cortexm4训教教材ppt培训课件

上传人:aa****6 文档编号:54809245 上传时间:2018-09-19 格式:PPTX 页数:127 大小:14.02MB
返回 下载 相关 举报
最新cortexm4训教教材ppt培训课件_第1页
第1页 / 共127页
最新cortexm4训教教材ppt培训课件_第2页
第2页 / 共127页
最新cortexm4训教教材ppt培训课件_第3页
第3页 / 共127页
最新cortexm4训教教材ppt培训课件_第4页
第4页 / 共127页
最新cortexm4训教教材ppt培训课件_第5页
第5页 / 共127页
点击查看更多>>
资源描述

《最新cortexm4训教教材ppt培训课件》由会员分享,可在线阅读,更多相关《最新cortexm4训教教材ppt培训课件(127页珍藏版)》请在金锄头文库上搜索。

1、Getting Started With the Tiva C Series TM4C123G LaunchPad Workshop,Agenda,Portfolio .,Introduction to ARM Cortex-M4F and Peripherals Code Composer Studio Introduction to TivaWare, Initialization and GPIO Interrupts and the Timers ADC12 Hibernation Module USB Memory Floating-Point BoosterPacks and gr

2、Lib Synchronous Serial Interface UART DMA,TI Embedded Processing Portfolio,TM4C123G MCU .,Tiva TM4C123G Microcontroller,Best-in-class power consumption As low as 370 A/MHz 500s wakeup from low-power modes RTC currents as low as 1.7A Internal and external power control,Core and FPU .,M4 Core and Floa

3、ting-Point Unit,32-bit ARM Cortex-M4 core Thumb2 16/32-bit code: 26% less memory & 25 % faster than pure 32-bit System clock frequency up to 80 MHz 100 DMIPS 80MHz Flexible clocking system Internal precision oscillator External main oscillator with PLL support Internal low frequency oscillator Real-

4、time-clock through Hibernation module Saturated math for signal processing Atomic bit manipulation. Read-Modify-Write using bit-banding Single Cycle multiply and hardware divider Unaligned data access for more efficient memory usage IEEE754 compliant single-precision floating-point unit JTW and Seri

5、al Wire Debug debugger access ETM (Embedded Trace Macrocell) available through Keil and IAR emulators,Memory .,TM4C123GH6PM Memory,256KB Flash memory Single-cycle to 40MHz Pre-fetch buffer and speculative branch improves performance above 40 MHz 32KB single-cycle SRAM with bit-banding Internal ROM l

6、oaded with TivaWare software Peripheral Driver Library Boot Loader Advanced Encryption Standard (AES) cryptography tables Cyclic Redundancy Check (CRC) error detection functionality 2KB EEPROM (fast, saves board space) Wear-leveled 500K program/erase cycles 32 16-word blocks Can be bulk or block era

7、sed 10 year data retention 4 clock cycle read time,Peripherals .,0x00000000 Flash,0x01000000 ROM,0x20000000 SRAM,0x22000000 Bit-banded SRAM,0x40000000 Peripherals & EEPROM,0x42000000 Bit-banded Peripherals,0xE0000000 Instrumentation, ETM, etc.,TM4C123GH6PM Peripherals,Battery-backed Hibernation Modu

8、le Internal and external power control (through external voltage regulator) Separate real-time clock (RTC) and power source VDD3ON mode retains GPIO states and settings Wake on RTC or Wake pin 16 32-bit words of battery backed memory 5 A Hibernate current with GPIO retention. 1.7 A without Serial Co

9、nnectivity USB 2.0 (OTG/Host/Device) 8 - UART with IrDA, 9-bit and ISO7816 support 6 - I2C 4 - SPI, Microwire or TI synchronous serial interfaces 2 - CAN,More .,TM4C123GH6PM Peripherals,Two 1MSPS 12-bit SAR ADCs Twelve shared inputs Single ended and differential measurement Internal temperature sens

10、or 4 programmable sample sequencers Flexible trigger control: SW, Timers, Analog comparators, GPIO VDDA/GNDA voltage reference Optional hardware averaging 2 analog and 16 digital comparators DMA enabled 0 - 43 GPIO Any GPIO can be an external edge or level triggered interrupt Can initiate an ADC sam

11、ple sequence or DMA transfer directly Toggle rate up to the CPU clock speed on the Advanced High-Performance Bus 5-V-tolerant in input configuration Programmable Drive Strength (2, 4, 8 mA or 8 mA with slew rate control) Programmable weak pull-up, pull-down, and open drain,More .,TM4C123GH6PM Periph

12、erals,Memory Protection Unit (MPU) Generates a Memory Management Fault on incorrect access to region Timers 2 Watchdog timers with separate clocks SysTick timer. 24-bit high speed RTOS and other timer Six 32-bit and Six 64-bit general purpose timers PWM and CCP modes Daisy chaining User enabled stal

13、ling on CPU Halt flag from debugger for all timers 32 channel DMA Basic, Ping-pong and scatter-gather modes Two priority levels 8,16 and 32-bit data sizes Interrupt enabled,More.,TM4C123GH6PM Peripherals,Nested-Vectored Interrupt Controller (NVIC) 7 exceptions and 71 interrupts with 8 programmable p

14、riority levels Tail-chaining Deterministic: always 12 cycles or 6 with tail-chaining Automatic system save and restoreTwo Motion Control modules. Each with: 8 high-resolution PWM outputs (4 pairs) H-bridge dead-band generators and hardware polarity control Fault input for low-latency shutdown Quadra

15、ture Encoder Inputs (QEI) Synchronization in and between the modules,Board.,Tiva EK-TM4C123GXL LaunchPad,ARM Cortex-M4F 64-pin 80MHz TM4C123GH6PMOn-board USB ICDI (In-Circuit Debug Interface) Micro AB USB portDevice/ICDI power switchBoosterPack XL pinout also supports existing BoosterPacks2 user pus

16、hbuttonsReset button3 user LEDs (1 tri-color device)Current measurement test points16MHz Main Oscillator crystal32kHz Real Time Clock crystal3.3V regulatorSupport for multiple IDEs:,Lab.,Lab 1: Hardware and Software Setup,Install the software Review the kit contents Connect the hardware Test the Qui

17、ckStart application,USB Emulation Connection,Agenda .,Agenda,IDEs.,Introduction to ARM Cortex-M4F and Peripherals Code Composer Studio Introduction to TivaWare, Initialization and GPIO Interrupts and the Timers ADC12 Hibernation Module USB Memory Floating-Point BoosterPacks and grLib Synchronous Serial Interface UART DMA,

展开阅读全文
相关资源
相关搜索

当前位置:首页 > 办公文档 > PPT模板库 > PPT素材/模板

电脑版 |金锄头文库版权所有
经营许可证:蜀ICP备13022795号 | 川公网安备 51140202000112号