分析vcore的&3_3v5v力量管理者电路

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1、Analyze the power regulator circuit for Vcore regulates at FB3 = REF (approx. 2.5V) in adjustable mode. FB3 is a Dual Mode input that also selects the 3.3V fixed output voltage setting when tied to GND. Connect FB3 to a resistor divider for adjustable-output mode. 412OUT12V/120mA Linear Regulator Ou

2、tput. Input supply comes from VDD. Bypass 12OUT to GND with 1F minimum. 5VDDSupply Voltage Input for the 12OUT Linear Regulator. Also connects to an internal resistor divider for secondary winding feedback, and to an 18V overvoltage shunt regulator clamp.112.2 Introduce typical control IC specificat

3、ion of MAX 1632 Controller (Cont.) Pin Description PI NNAM EFUNCTION6 SYNCOscillator Synchronization and Frequency Select. Tie to VL for 300kHz operation; tie to GND for 200kHz operation. Can be driven at 240kHz to 350kHz for external synchronization. 7TIME/ON5Dual-Purpose Timing Capacitor Pin and O

4、N/OFF Control Input. See Power-Up Sequencing and ON/OFF Controls section. 8 GNDLow-Noise Analog Ground and Feedback Reference Point9REF2.5V Reference Voltage Output. Bypass to GND with 1F min. 10SKIPLogic-Control Input that disables Idle Mode when high. Connect to GND for normal use. 11RESETActive-L

5、ow Timed Reset Output. RESET swings GND to VL. Goes high after a fixed 32,000 clock-cycle delay following power- up. 12FB5Feedback Input for the 5V SMPS; regulates at FB5 = REF (approx. 2.5V) in adjustable mode. FB5 is a Dual Mode input that also selects the 5V fixed output voltage setting when tied

6、 to GND. Connect FB5 to a resistor divider for adjustable-output mode.122.2 Introduce typical control IC specification of MAX 1632 Controller (Cont.) Pin Description PI NNAM EFUNCTION13 CSL5Current-Sense Input for the 5V SMPS.Also serves as the feedback input in fixed-output mode, and as the bootstr

7、ap supply input when the voltage on CSL5/VL is 4.5V. 14CSH5Current-Sense Input for the 5V SMPS. Current-limit level is 100mV referred to CSL5. 15 SEQPin-Strap Input that selects the SMPS power-up sequence: SEQ = GND: 5V before 3.3V, RESET output determined by both outputs; SEQ = REF: Separate ON3/ON

8、5 controls, RESET output determined by 3.3V output; SEQ = VL: 3.3V before 5V, RESET output determined by both outputs 16DH5Gate-Drive Output for the 5V, high-side N-channel switch. DH5 is a floating driver output that swings from LX5 to BST5, riding on the LX5 switching node voltage. 17LX5Switching

9、Node (inductor) Connection. Can swing 2V below ground without hazard. 18BST5Boost capacitor connection for high-side gate drive (0.1F) 132.2 Introduce typical control IC specification of MAX 1632 Controller (Cont.) Pin DescriptionPI NNAM EFUNCTION19 DL5Gate-Drive Output for the low-side synchronous-

10、rectifier MOSFET. Swings 0V to VL. 20PGNDPower Ground 21 VL5V Internal Linear-Regulator Output. VL is also the supply voltage rail for the chip. After the 5V SMPS output has reached +4.5V (typical), VL automatically switches to the output voltage via CSL5 for bootstrapping.Bypass to GND with 4.7F. V

11、L supplies up to 25mA for external loads. 22V+Battery Voltage Input, +4.2V to +30V. Bypass V+ to PGND close to the IC with a 0.22F capacitor. Connects to a linear regulator that powers VL. 23/SHDNShutdown Control Input, active low. Logic threshold is set at approximately 1V. For automatic start-up,

12、connect SHDN to V+ through a 220k resistor and bypass SHDN to GND with a 0.01F capacitor. 24DL3Gate-Drive Output for the low-side synchronous-rectifier MOSFET. Swings 0V to VL.142.2 Introduce typical control IC specification of MAX 1632 Controller (Cont.) Pin Description PI NNAM EFUNCTION25BST3Boost

13、 Capacitor Connection for high-side gate drive (0.1F) 26 LX3Switching Node (inductor) Connection. Can swing 2V below ground without hazard. 27DH3Gate-Drive Output for the 3.3V, high-side N-channel switch. DH3 is a floating driver output that swings from LX3 to BST3, riding on the LX3 switching node

14、voltage. 28RUN/ON3ON/OFF Control Input. See Power-Up Sequencing and ON/OFF Controls section .152.3 Analyze the 3.3V&5V regulator Schematics163. Analyze the CPU Vcore regulator circuit 3.1 1-Phase vs Multi-Phase 3.2 Introduce the HIP6301 controller 3.3 Analyze the CPU Vcore regulator Schematics 173.1

15、 1-Phase vs Multi-PhaseDesign Trade-off (1): 1-Phase vs Multi-Phase 1-Phase: -Pro: Only one inductor -Cons: Low efficiency Large inductor may not fit into notebook PC High switching losses and possible dV/dt related catastrophic failure. High input ripple current. Current crowding on the PCB introdu

16、ces “hot spot”. More EMI.183.1 1-Phase vs Multi-Phase (Cont.)Design Trade-off (2): 1-Phase vs Multi-Phase Multi-Phase: -Current is distributed evenly to avoid hot spots. -Input ripple current cancellation allows the use of smaller input cap -Output ripple current cancellation allows the use of smaller output inductance Smaller size Faster load transient responses -High efficiency at high current application

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