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1、中文题目：基于 CPLD 和单片机的频率测量计的设计外文题目：THE DESIGN OF FREQUENCY MEASUREMENT BASED ON CPLD AND SINGLE CHIP MICYOCO 毕业设计（论文）共 70 页 图纸共 2 张完成日期 20011 年 6 月 答辩日期 20011 年 6 月摘要本文主要论述了利用 CPLD 进行测频计数，单片机实施控制实现等精度频率计的设计过程。该频率计利用等精度的设计方法，克服了基于传统测频原理的频率计的测量精度随被测信号频率的下降而降低的缺点。等精度的测量方法不但具有较高的测量精度，而且在整个频率区域保持恒定的测试精度。该频率计
2、利用 CPLD 来实现频率的测量计数。利用单片机完成整个测量电路的测试控制、数据处理和显示输出。本文详细论述了硬件电路的组成和单片机的软件控制流程。其中硬件电路包括键控制模块、显示模块、输入信号整形模块以及单片机和 CPLD 主控模块。设计器件采用Atmel 公司的单片机 AT89C51 和 Altera 公司的 FPGA 芯片 MAX7000 系列EPM7128SLC84-15。键控制模块设置 1 个开始键和 3 个时间选择键，键值的读入采用一片 74LS165 来完成；显示模块用 8 只 74LS164 完成 LED 的串行显示；被测信号经限幅后由两级直接耦合放大器进行放大，再经施密特触发
3、器整形后输入 CPLD；标准频率采用40MHZ 有源晶振动实现；单片机软件用汇编语言编写，软件模块对应于硬件电路的每一个部分，还包括部分数据计算和转换模块。关键词：单片机；CPLD；频率计；测频；等精度AbstractThe reach pape rmainly discusses the design process of equal-accuracy frequency meter that uses CPLD to count the frequency measurement and frequency meter is also controled by single chip co
4、mputer. The frequency meter makes use of equal-accuracy design that can overcome the disadvantage of traditional measuring principle, which precision declines as measured signal frequency does. The equal-accuracy measurement not only has higher measuring precision, but also can keep invariable measu
5、ring precision in whole area of frequency.This frequency meter uses CPLD to realize the measuring count of frequency. Single chip computer completes the test control、data processing and display output of the system.This essay discusses the compose of hardware circuit and software control flow of sin
6、gle chip computer in detail. Hardware circuit includes key control module、display module, plastic module of input signal、single chip computer control module and CPLD main control module.The frequency meter adopts single chip computer AT89C51 of Atmel company and EPM7128SLC84-15 of Altera company. Ke
7、y control module has 1 function key and 3 time selection key. A chip 74LS165 completes the key value input. Display module uses eight 74LS165s to realize the serial display of LED. First, the measuring signal amplitude is limited. Second, the single is amplified by two class direct coupling amplifie
8、r. Finally, the signal inputs CPLD after it is trimed by Smitter trigger. Standard frequency is 40MHZ. Software program of single chip computer is writed by assembly language. Some of software program is corresponded to every hardware part, the others includ data count and transform.Key Words：SCM; C
9、PLD; Frequency meter; Frequency measurement; Equal-precision目录摘要 .IABSTRACT .II1 绪论 .11.1 频率计基础知识.11.1.1 对灵敏度和准确度的要求.11.1.2 测量仪器的准确度的选择.21.1.3 微波计数器的使用.21.2 技术背景及发展趋势.31.3 EDA 技术的发展及其应用 .41.4 单片机概论.51.5 频率计的设计内容和意义.62 设计理论基础 .82.1 CPLD/FPGA 设计意义.82.1.1 EDA.82.1.2 CPLD(复杂可编程逻辑器件) .82.1.3 FPGA（现场可编程门阵列）.92.1.4 FPGA 和 CPLD 的选择.92.2 频率测量原理.92.2.1 频率测量.102.2.2 周期测量.102.2.3 等精度测频法.112.3 方案设计.132.3.1 基于单片机的方案.132.3.2 基于 CPLD/FPGA 和单片机相结合的方案.142.3.3 方案论证与选择.153 单元模块设计 .163.1 系统组成.163.2 键控制模块.173.2.1 串行输出移位寄存器（74LS165） .173.2.2 键盘电路.183.3 显示模块.
