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1、DATA SHEETDATA SHEETProduct specification File under Integrated Circuits, IC04January 1995INTEGRATED CIRCUITSHEF4011B gates Quadruple 2-input NAND gateFor a complete data sheet, please also download: The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC The IC04 LOCMOS HE4000B Logic Package O
2、utlines/Information HEF, HECJanuary 19952Philips SemiconductorsProduct specificationQuadruple 2-input NAND gateHEF4011B gatesDESCRIPTIONThe HEF4011B provides the positive quadruple 2-input NAND function. The outputs are fully buffered for highest noise immunity and pattern insensitivity of output im
3、pedance.Fig.1 Functional diagram.HEF4011BP(N):14-lead DIL; plastic(SOT27-1)HEF4011BD(F):14-lead DIL; ceramic (cerdip)(SOT73)HEF4011BT(D):14-lead SO; plastic(SOT108-1)( ): Package Designator North AmericaFig.2 Pinning diagram.FAMILY DATA, IDDLIMITS category GATESSee Family SpecificationsFig.3 Logic d
4、iagram (one gate).January 19953Philips SemiconductorsProduct specificationQuadruple 2-input NAND gateHEF4011B gatesAC CHARACTERISTICS VSS= 0 V; Tamb= 25 C; CL= 50 pF; input transition times 20 nsVDD VSYMBOLTYPMAXTYPICAL EXTRAPOLATION FORMULAPropagation delays555110ns28 ns+(0,55 ns/pF) CLIn On10tPHL;
5、 tPLH2545ns14 ns+(0,23 ns/pF) CL152035ns12 ns+(0,16 ns/pF) CLOutput transition times560120ns10 ns+(1,0 ns/pF) CLHIGH to LOW10tTHL3060ns9 ns+(0,42 ns/pF) CL152040ns6 ns+(0,28 ns/pF) CL560120ns10 ns+(1,0 ns/pF) CLLOW to HIGH10tTLH3060ns9 ns+(0,42 ns/pF) CL152040ns6 ns+(0,28 ns/pF) CLVDD VTYPICAL FORMU
6、LA FOR P (W)Dynamic power51300 fi+ (foCL) VDD2wheredissipation per106000 fi+ (foCL) VDD2fi= input freq. (MHz)package (P)1520 100 fi+ (foCL) VDD2fo= output freq. (MHz)CL= load capacitance (pF) (foCL) = sum of outputsVDD= supply voltage (V)This datasheet has been download from:Datasheets for electronics components.
