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1、AT89C2051 Microcontroller Instructions1.1 FeaturesCompatible with MCS-51 Products2 Kbytes of Reprogrammable Flash MemoryEndurance: 1,000 Write/Erase Cycles2.7 V to 6 V Operating RangeFully Static Operation: 0 Hz to 24 MHzTwo-Level Program Memory Lock128 x 8-Bit Internal RAM15 Programmable I/O LinesT
2、wo 16-Bit Timer/CountersSix Interrupt SourcesProgrammable Serial UART ChannelDirect LED Drive OutputsOn-Chip Analog ComparatorLow Power Idle and Power Down Modes1.2 DescriptionThe AT89C2051 is a low-voltage, high-performance CMOS 8-bit microcomputer with 2 Kbytes of Flash programmable and erasable r
3、ead only memory (PEROM). The device is manufactured using Atmels high density nonvolatile memory technology and is compatible with the industry standard MCS-51 instruction set and pinout. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C2051 is a powerful microcompu
4、ter which provides a highly flexible and cost effective solution to many embedded control applications.The AT89C2051 provides the following standard features: 2 Kbytes of Flash, 128 bytes of RAM, 15 I/O lines, two 16-bit timer/counters, a five vector two-level interrupt architecture, a full duplex s
5、erial port, a precision analog comparator, on-chip oscillator and clock circuitry. In addition, the AT89C2051 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters
6、, serial port and interrupt system to continue functioning. The Power Down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset.1.3 Pin Configuration1.4 Pin DescriptionVCC Supply voltage.GND Ground.Port 1Port 1 is an 8-bit bidirectio
7、nal I/O port. Port pins P1.2 to P1.7 provide internal pullups. P1.0 and P1.1 require external pullups. P1.0 and P1.1 also serve as the positive input (AIN0) and the negative input (AIN1), respectively, of the on-chip precision analog comparator. The Port 1 output buffers can sink 20 mA and can drive
8、 LED displays directly. When 1s are written to Port 1 pins, they can be used as inputs. When pins P1.2 to P1.7 are used as inputs and are externally pulled low, they will source current (IIL) because of the internal pullups.Port 1 also receives code data during Flash programming and program verifica
9、tion.Port 3Port 3 pins P3.0 to P3.5, P3.7 are seven bidirectional I/O pins with internal pullups. P3.6 is hard-wired as an input to the output of the on-chip comparator and is not accessible as a general purpose I/O pin. The Port 3 output buffers can sink 20 mA. When 1s are written to Port 3 pins th
10、ey are pulled high by the internal pullups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups.Port Pin Alternate Functions P3.0RXD (serial input port)P3.1TXD (serial output port)P3.2INT0 (external interrupt 0)P3.3IN
11、T1 (external interrupt 1)P3.4T0 (timer 0 external input)P3.5T1 (timer 1 external input)Port 3 also serves the functions of various special features of the AT89C2051 as listed below:1.5 Oscillator CharacteristicsXTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier which c
12、an be configured for use as an on-chip oscillator, as shown in Figure 1. Either a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 2. There are no requirements on the duty cyc
13、le of the external clock signal, since the input to the internal clocking circuitry is through a divideby-two flip-flop, but minimum and maximum voltage high and low time specifications must be observed.1.6 Special Function RegistersA map of the on-chip memory area called the Special Function Regist
14、er (SFR) space is shown in the table below. Note that not all of the addresses are occupied, and unoccupied addresses may not be implemented on the chip. Read accesses. to these addresses will in general return random data, and write accesses will have an indeterminate effect.User software should no
15、t write 1s to these unlisted locations, since they may be used in future products to invoke new fea tures. In that case, the reset or inactive values of the new bits will always be 0.1.7 Restrictions on Certain InstructionsThe AT89C2051 and is an economical and cost-effective member of Atmels growin
16、g family of microcontrollers. It contains 2 Kbytes of flash program memory. It is fully compatible with the MCS-51 architecture, and can be programmed using the MCS-51 instruction set. However, there are a few considerations one must keep in mind when utilizing certain instructions to program this device.All the instructions related to jumping or branching should be restricted such that the destination address falls within the physical program memory space of the device, which
