《2010级硕士模拟集成电路分析与设计期末复习题》由会员分享，可在线阅读，更多相关《2010级硕士模拟集成电路分析与设计期末复习题（13页珍藏版）》请在金锄头文库上搜索。
1、20102010 级研究生级研究生模拟集成电路分析与设计模拟集成电路分析与设计复习复习一、Questions：1What is the problem of simple differential circuit? How to solve this problem?If Vin,CM is low, output will be clipped. (失真)2Describe advantages and drawbacks of differential signals comparing with single-ended signal.Advantages:a. Higher immun
2、ity to environmental noiseb. Reject supply noisec. Reduce coupled noise in transmission lined. Other advantages(1).Increase output swing from VDD-(VGS-VTH) to 2VDD-(VGS-VTH)(2).Simpler biasing(3).Higher linearityDrawback:occupy twice area3. Why analog design needed in Optical Receivers?High frequenc
3、y signals are not suitable for transmitting over long distance in the traditional cable due to the severe interference and considerable attenuation because of the limited bandwidth of the cable.In this case, the electrical high frequency signals are converted into the optical signals first by the la
4、ser diode, then these optic signals are transmitted by an optical fiber, which has extremely wide band and very low loss.In the other end, the optical signals are converted into electrical signals again by the photodiode.Since the electrical current converted by a photodiode is very small, the recei
5、ver after the photodiode must process a low-level signal at a very high speed, which requires a low noise, broadband circuit design. 4. Which two figures play most important role in technology nodes scaling down? Please describe in detail.Minimum channel length Leff = 0.15 m often represents the tec
6、hnology nodes;Oxide thickness tox = 5nm or 50 often affects the threshold voltage Vt (阈值电压）and thus the power supply.These two figures play most important role in technology nodes scaling down.5. If there is a small mismatch between M1 and M2, how do the parameters of the transistors affect the comm
7、on mode rejection ratio (CMRR) of a differential pair?)/2g(gg :mean value thedenotes gm wherem2m1m6. Write the input pole of the circuit in Fig. 1.Fig.1)/()1 (/1sradCARFsin7. When both NMOS and PMOS devices are needed to be placed on one chip, what is needed?When both NMOS and PMOS devices are neede
8、d to be placed on one chip, n-well (n 阱） or p-well (p 阱) is needed.8. What is the problem for the circuit in Fig. 2? Any suggestions to solve it?Fig. 2Problem of above differential pair:Small-signal drain current of M1 is “wasted”)arg()21 (242121eltoonotismismatchifRggggRggggAACMRRSSm mmmSSmmmmDMCMD
9、MDMSolve method:Use differential pair with active current mirror to combine the small-signal current together.9. Among the output noise and the input-referred noise, which one is more popular to be used in the circuit simulation? Why?Since the output noise depends on the gain, it is hard to fairly c
10、ompare the effects of noises of different circuits because of the different gains.Therefore, the input-referred noise is more popular to be used in the circuit simulation.10. Refer to Fig. 3, what benefits do we have for using cascode structure in current source? And any drawbacks?Fig. 3The benefit
11、of cascode is that it gets more accurate current.Its drawbacks are higher voltage headroom.11. Can we use the statistical value of noise amplititude? If the answer is no, then what we usually use when considering the noise in circuit systems? Explain the reason.The answer is no, because the statisti
12、cal value of any noise amplititude over entire time domain is zero. 0)(0 dttxFortunately, the statistical value of noise power over all time domain is not zero !So we usually incorporate average power of a random signal in circuit analysis. 12. Explain why use diode-connected for M1 in Fig. 4Fig. 4D
13、iode-connected to ensure M1 always in saturation! 13. Describe the steps for calculating the loop gain of a feedback system. And calculate LG in Fig. 5 following the steps.Fig.5Step 1: Set the main input to zero;Step 2: Break the loop at some point;Step 3: Inject a test signal in the “right directio
14、n”;Step 4: Follow the signal around the loop;Step 5: Obtain the value that returns to the break point;Step 6: The negative of the transfer function derived is the loop gain;It is a dimensionless quantity (无量纲参数）.)(11 212 omtFrgCCCVV212 11/CCCrgVVomtF212 11/CCCrgVVALGomtF14. What is CMRR? Write down
15、the definition of it.DMCMDM AACMRR15. Write the input and output pole of the circuit in Fig. 6, ignoring the effect of CGs and RS on Cout.Fig. 6)(/1)1 (/1GDDBDoutGDDmGSsin CCRCRgCR16. Plot a diagram of a simple PLL and explain the working principle of it in short. Phase detector (PD) compares the ph
16、ases of Vout and Vin, generating an error signal;Low-pass filter (LPF) transfer the error wave to a dc level to the oscillator;The dc level can control the output frequency by VCO;In this way, the frequency and phase of Vout can be locked to Vin.17. What is Power spectral density (PSD)? Use the expression and the plot to show it.2/2/2 11| )(|1lim)(TTfTxdttxTfSPower spectral density (PSD): the spectrum shows how much power
