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1、l: 2007null01null25; null: 2007null04null02B3TADCbvIP陈珍海1, 郭良权2( 1.2v,null 214122;2.S0S/vE,null 214035)nullKnull1: null 介绍了一种适用于嵌入式模拟/数字转换器( ADC)应用的全差分低功耗性能可调运算放大器IP核b该运放芯核采用T SMC 0. 25 nullm标准数字CMOS工艺设计b基于BSIM3V3 Spice模型,采用Hspice在2. 5 V单电源电压下,分别对整个电路在几组不同的偏置条件下进行仿真,其中一组偏置在低频增益为74 dB,相位裕度为60null,单位增
2、益带宽为107 MH z,摆率为210 V/nulls时,整个电路的静态功耗仅为1. 75 mWb1oM: null CMOS; 全差分运算放大器; 模拟/数字转换器; 模拟IP核ms|: null T N432 null null null null null null nullDSM: null Anull null null null null null nullcI|: 1004null3365(2007)04null0566null04nullDesign of Operational AmplifierIP Core for Embedded A/D ConvertersCH EN
3、 Zhennullhai1, GU O Liangnullquan2(1. Dept. of Information Engineering, Southern Yangtze University, Wuxi, Jiangsu 214122;2. The 58thInstitute, ChinaElectronics Technology Group Corp., Wuxi, Jiangsu 214035, P. R. China)nullAbstract: null Based on embedded ADC application, a low power fully different
4、ial operational amplifier IP core withreconfigurable performance is presented. The operational amplifier was realized in TSMCnulls 0. 25 nullm 1P5M CMOSprocess. Based on BSIM3V3 Spice model, the whole circuit was simulated using Hspice with a single power supplyof 2. 5 V under different bias conditi
5、ons, it has been shown that, in one bias condition, the operational amplifier hasan open loop gain of 74 dB, a phase margin of 60null, a slew rate of 210 V/nulls and a unit gain bandwidth of 107 MHz,while dissipating only 1. 75 mW of static power.Keywords: null CMOS; Fully differential OP amp; A/D c
6、onverter; Analog IP coreEEACC: null 1220null1 null 引null 言+j/,4,-K5d( SOC)XV2a85,iOEM,85|+)9 1b4,!9b1!9,!99FSOC,BIPvbY,TCLW3)Wg/SOCVFs,SOC=B3TADCbbvTADC1Fs,?YADC?b!9?b9ADC!9b!9B3TA DCs?VbvIPbbT SMC 0. 25 nullmS3CMOS!9,P),T2. 5 V,YV!,V?,b2 null 模拟IP 核简介SOC=3Ev!9,3742007M80MicroelectronicsVolnull 37,
7、No. 4Augnull 2007S3CMOSLCEIP,VA!9/,gbV+M,3IP/X|Z,EIP/T-b1y:n5,E?,.23L39m33,HqdG,iOMd 2null3bHqV0. 18nullmM0. 13 nullm,3,E?4?,Q7P?/,.3rbyN,HqM,EB1!9bQ,EvP/9VT,3iiSOC,371.2#PEv?T 1b6,E&7?13(V!9N?pA) 4bSOC!91p,3TEIP/+ 5 :1) 低功耗bySOC=Bc3v,Ev#RF,BvdK, IPvA+;2) 复用性b3TEIPv3IPvBVHq/P;3) 灵活性b3TEIPvV1&?,dpb3
8、null 运算放大器电路结构3.1nullbv98bvm1U,)s,y7v3.11b,B)Pnull*cTnullE,PHq/V9m,iOhlbPNMOS5T5, PMOS5,P|N MOS5F,bvVrKv,yNMOS51PMOS5%Mqq 6b=)P),vz?,iOV430 dB9mb)Wq,VP3Qs,V79mz( GBW) 7b6,BM1,E?49mz 8b|!lCC1CC2,sYM3M5,VrB9mzbm1nullbv98Fig. 1null Structure implementation of the opnullamp3. 2nullbvQbvs,stbv,)TLu,YQ( CMFB) 9b,Q!9)sY!9QZTb)sYBQZT,VPYFbB)Qm2U,s,PH_bB)Vo+Vo- ,WBH3|bL!Vo+Vo-6,APH9v,T,PWhl,V7Pnullm2nullB)QFig. 2null Common
