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1、Class exerciserealize the logic function F with 3-to-8 decoder and logic gates.,F = (X,Y,Z) ( 1, 2, 4, 5 ),6.4 decoder 译码器,Review of Last Class,6.4.1Binary Decoder (二进制译码器) n-to- 2n decoder The most common decoder circuit is an n-to-2n decoder or binary decoder. Such a decoder has an n-bit binary in
2、put code and a 1-out-of-2n output code.,Review of Last Class,Design it !,Y3=EN.I1.I0,Y2=EN.I1.I0,Y1=EN.I1.I0,Y0=EN.I1.I0,Review of Last Class,n-to- 2n decoder,Yi = EN mi,0 X X 0 0 0 0 1 0 0 0 0 0 1 1 0 1 0 0 1 0 1 1 0 0 1 0 0 1 1 1 1 0 0 0,inputs EN I1 I0,outputs Y3 Y2 Y1 Y0,The truth table for a 2-
3、to-4 binary decoder,当输入使能端(EN)有效时 Yi = mi,Dont care notation (无关符号),Review of Last Class,6.4.2 Logic Symbols for Larger-Scale Elements,With respect to active levels, its important to use a consistent convention to naming the internal signals and external pins.,G1,G2A-L,G2B-L,Y0-L,B,C,Y7-L,A,Review o
4、f Last Class,The 74x138 is a commercially available MSI 3-to-8 decoder. the 74x138 has active-low outputs.,(P387),Review of Last Class,m5,M5,Review of Last Class,Yi = EN mi,Yi_L = Yi = ( EN mi ),EN = G1 G2A G2B = G1 G2A_L G2B_L,m5,补充：用译码器和逻辑门实现逻辑函数,F = (X,Y,Z) (0,3,6,7) = (X,Y,Z) (1,2,4,5),对于二进制译码器：
5、Yi = EN mi 当使能端有效时，Yi = mi 对低电平有效输出：Yi_L = Yi 当使能端有效时，Yi_L = mi = Mi,用译码器和逻辑门实现逻辑函数,Z Y X,F = (X,Y,Z) (0,3,6,7),当使能端有效时 Yi = mi,对低电平有效输出：Yi_L = Yi=mi,用译码器和逻辑门实现逻辑函数,Z Y X,F = (X,Y,Z) (0,3,6,7),= M1 M2 M4 M5,= m1 m2 m4 m5,F = (X,Y,Z) ( 1, 2, 4, 5 ),Z Y X,74x139,Truth table?,Example 3: The 74x139 Dual
6、 2-to-4 Decoder,What is the equation for the external output signal 1Y0-L?,74x139,Truth table,Example 3: The 74x139 Dual 2-to-4 Decoder,1Y0-L=1G (1B 1A),74x139,How to design the 4-to-16 decoder?,6.4.4 Cascading Binary Decoders (级联二进制译码器）(P390),思路： 16个输出需要 片74x138？,任何时刻只有一片在工作。 4个输入中， 哪些位控制片选 哪些位控制输入
7、,Example 4:design the 4-to-16 decoder,Consider: How to make a 5-to-32 Decoder with 3-to-8 Decoder? (思考：用74x138设计 5-32 译码器) (32个输出需要多少片74x138 ？) (控制任何时刻只有一片工作) (利用使能端),Consider: How to make a 5-to-32 Decoder with 3-to-8 Decoder? (思考：用74x138设计 5-32 译码器) Control inputs of three low-order bits of a 5-bi
8、t code word (5个输入的低3位控制输入) Control chips of two high-order bits of a 5-bit code word (5个输入的高2位控制片选),Example 5:design the 5-to-32 decoder,74x139,(P391),补充：用译码器和逻辑门实现逻辑函数,F = (X,Y,Z) (0,3,6,7) = (X,Y,Z) (1,2,4,5),对于二进制译码器：Yi = EN mi 当使能端有效时，Yi = mi 对低电平有效输出：Yi_L = Yi 当使能端有效时，Yi_L = mi = Mi,用译码器和逻辑门实现逻
9、辑函数,Z Y X,F = (X,Y,Z) (0,3,6,7),当使能端有效时 Yi = mi,对低电平有效输出：Yi_L = Yi=mi,用译码器和逻辑门实现逻辑函数,Z Y X,F = (X,Y,Z) (0,3,6,7),= M1 M2 M4 M5,= m1 m2 m4 m5,F = (X,Y,Z) ( 1, 2, 4, 5 ),Z Y X,BCD Decoder (二十进制译码器),Inputs : 4-bit BCD code Outputs :1-out-of 10 Code,多余的6个状态如何处理？,输出均无效：拒绝“翻译”,作为任意项处理 电路内部结构简单,二-十进制译码器,任
10、意 项,6.4.8 Seven-Segment Decoders (七段显示译码器) (P408),Normally use (常用的有)： Light-Emitting Diodes （LED,半导体数码管） Liquid-Crystal Display （LCD,液晶数码管）,Input code: 4-bit BCD 输入信号：BCD码（用A3A2A1A0表示） Output Code: Seven-Segment Code 输出：七段码（的驱动信号）a g 1 表示亮(On)，0 表示灭(Off),1111110,1101101,0011111,Seven-Segment Decode
11、rs(七段显示译码器),七段显示译码器的真值表,6.5 Encoder,ENCODER (P408),If the devices output code has fewer bits than the input code, the device is usually called an encoder. Probably the simplest encoder to build is a 2n-to-n or binary encoder.,encoder（编码器）,2n inputs,n outputs,encoder （编码器）,Y0 = I1 + I3 + I5 + I7,Y1 =
12、 I2 + I3 + I6 + I7,Y2 = I4 + I5 + I6 + I7,前提：任何时刻只有 一个输入端有效。,2n inputs,n outputs,encoder （编码器）,Y0 = I1 + I3 + I5 + I7,Y1 = I2 + I3 + I6 + I7,Y2 = I4 + I5 + I6 + I7,前提：任何时刻只有 一个输入端有效。,Trouble: When more than One Inputs are asserted?,优先级（priority）,If multiple requests can be made simultaneously , how
13、can the encoding device decide which?,The solution is to assign priority to the input lines, so that when multiple requests are asserted, the encoding device produces the number of the highest-priority requestor. Such a device is called a priority encoder. (P408),6.5.1 Priority Encoders (P410 ) (优先编
14、码器),将 I0I7 转换为 H0H7， 保证其中，任何时刻只有一个有效,H7 = I7 H6 = I6 I7 H5 = I5 I6 I7 H0 = I0 I1 I2 I6 I7 A2 = H4 + H5 + H6 + H7 A1 = H2 + H3 + H6 + H7 A0 = H1 + H3 + H5 + H7,Highest-Priority 数大优先,如果没有输入有效，则 IDLE 为1 IDLE = I1 I2 I6 I7,Logic symbol for a generic 8-input priority encoder.,小论文：,题目：若你将处理的0-15V信号，用什么电路可以将其转化为5伏TTL逻辑可处理的信号（即转化为0V-5V的信号）？画出1至2个具体电路。,Please hand this home work on This Wednesday!,
