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1、5 5 4 4 3 3 2 2 1 1 DD CC BB AA Note: Use BCLK as clock source instead of MCLK CMA-4544PF-W CMA-4544PF-W IOVDD_1V8_MIC VDD_2V8_LDO AVDD_MIC VDD_1V8_LDO IOVDD_1V8_MIC AVDD_MIC IOVDD_1V8_MIC AUD_CLK_1V8_CC P3 AUD_FSYNC_1V8_CC P3 AUD_IN_1V8_CC P3 AUDIO_nRESET_1V8_5229 P2 I2C_SDA_1V8_5229 P2 I2C_SCL_1V8
2、_5229 P2 SizeEDGE NoRev Pageof Title Drawn By Designer Layout Approval Date BT-MSP-AUDSOURCE Monday, April 07, 201414 B1.1Zahid Haq6576620 Prashantha, Zahid Miguel Sanchez SizeEDGE NoRev Pageof Title Drawn By Designer Layout Approval Date BT-MSP-AUDSOURCE Monday, April 07, 201414 B1.1Zahid Haq657662
3、0 Prashantha, Zahid Miguel Sanchez SizeEDGE NoRev Pageof Title Drawn By Designer Layout Approval Date BT-MSP-AUDSOURCE Monday, April 07, 201414 B1.1Zahid Haq6576620 Prashantha, Zahid Miguel Sanchez C54 1.0uF 6.3V TP11 R360R C56 1.0uF 6.3V R370R J37 MIC2 2 2 1 1 R16 2.7K C53 0.1uF 6.3V R39 10K U12 TL
4、V320ADC3101 BCLK 1 WCLK 2 DOUT 3 nRESET 4 MICBIAS1 5 IN3L 6 IN2L 7 IN1L 8 AVSS 9 AVDD 10 IN1R 11 IN2R 12 SDA 18 SCL 17 I2C_ADR1 16 I2C_ADR0 15 MICBIAS2 14 IN3R 13 MCLK 24 DVSS 23 DVDD 22 IOVDD 21 GPIO2 20 GPIO1 19 EPAD 25 C61 0.47uF J30 AVDD_MIC 1 2 J32 1 2 R20 2.2K J35 1 2 J39 PHONOJACK STEREO-15 1
5、 2 3 4 5 J36 1 2 J34 1 2 C55 0.1uF 6.3V TP7 J31 IOVDD_MIC 1 2 J33 1 2 C51 0.1uF 6.3V J29 HEADER 1 1 J28 MIC1 2 2 1 1 R17 2.7K C52 1.0uF 6.3V C60 0.47uF TP8 R19 2.2K 5 5 4 4 3 3 2 2 1 1 DD CC BB AA VOL_DOWN VOL_UP PAUSE_PLAY PREVIOUS NEXT DECOUPLING CAPS, AS CLOSE AS POSSIBLE TO MSP430 MSP430 RESET C
6、APTOUCH SENSORS MSP430 HOST 2 pos SW to select FET or LDO PWR MSP_ACLK_3V3 JTAG SENSE 2mA 2mA Label Pin 1 2mA SMCLK_5229 CB0 CBOUT CB1 CB2 DVIO_1V8_5229 VCC_5229 VCC_5229 DVIO_1V8_5229 VCC_5229 TEST/SBWTCK_5229 nRST/SBWTDIO_5229 TCK_5229 TMS_5229 TDI_5229 TDO_5229 nRST/SBWTDIO_5229 TCK_5229 TMS_5229
7、 TDI_5229 TDO_5229 TEST/SBWTCK_5229 DVIO_1V8_5229VCC_5229 VCORE VCORE VCC_5229 nRST/SBWTDIO_5229 CBOUT CB0 CB1 CB2 DVIO_1V8_5229 LED1 LED2 LED1 LED2 JTAG_PWR_3V3 JTAG_PWR_3V3 VCC_5229 DVIO_1V8_5229 LED3 LED3 VDD_1V8_LDO VDD_2V8_LDO AUDIO_nRESET_1V8_5229 P2,3 I2C_SDA_1V8_5229 P2,3 I2C_SCL_1V8_5229 P2
8、,3 SLOW_CLK_1V8_CC P2,3 HCI_RX_1V8_CC P2,3 HCI_TX_1V8_CC P2,3 HCI_RTS_1V8_CC P1,2 HCI_CTS_1V8_CC P1,2 nSHUTDOWN_1V8_CC P1,2 SizeEDGE NoRev Pageof Title Date BT-MSP-AUDSOURCE Monday, April 07, 201424 B1.16576620SizeEDGE NoRev Pageof Title Date BT-MSP-AUDSOURCE Monday, April 07, 201424 B1.16576620Size
9、EDGE NoRev Pageof Title Date BT-MSP-AUDSOURCE Monday, April 07, 201424 B1.16576620 R15 470R C39 1.0uF 6.3V D2 YLW 12 C46 12pF 50V S4 ScanSW DNI S0 A0 S1 1 S2 2 S3 3 J6 1 2 R3275k Y2 32.768KHz IN 1 OUT 2 D5 GRN 12 J15 DEBUG 1 2 EPAD U10 MSP430F5229IRGCR P6.0/CB0 1 P6.1/CB1 2 P6.2/CB2 3 P6.3/CB3 4 P6.
10、4/CB4 5 P6.5/CB5 6 P6.6/CB6 7 P6.7/CB7 8 P5.0 9 P5.1 10 AVCC 11 P5.4/XIN 12 P5.5/XOUT 13 AVSS 14 DVCC 15 DVSS 16 VCORE 17 P1.0 18 P1.1 19 P1.2 20 P1.3 21 P1.4 22 P1.5 23 P1.6 24 P1.7 25 DVIO 40 DVSS_2 39 P2.0 26 P2.1 27 P2.2 28 P2.3 29 P2.4 30 P2.5 31 P2.6 32 P2.7 33 P3.4/UCA0RXD 38 P3.3/UCA0TXD 37
11、P3.2 36 P3.1/UCB0SCL 35 P3.0/UCB0SDA 34 P4.7 48 P4.6 47 P4.5/PM_UCA1RXD 46 P4.4/PM_UCA1TXD 45 P4.3 44 P4.2 43 P4.1 42 P4.0 41 P7.4 53 P7.3 52 P7.2 51 P7.1 50 P7.0 49 TEST/SBWTCK 59 P5.3 58 P5.2 57 nRST/NMI 56 BSLEN 55 P7.5 54 nRSTDVCC/SBWTDIO 64 PJ.3/TCK 63 PJ.2/TMS 62 PJ.1/TDI 61 PJ.0/TDO 60 DVSS_3
12、 65 C41 470nF 6.3V J17 HEADER 1 1 R11 18K J2 MSP430 JTAG 1 3 5 7 9 2 4 6 8 10 12 14 11 13 Electrodes DNI pad1 1 pad2 2 pad3 3 R12 47K R3175k R28 47K R6 470R C44 2.2nF C43 2.2nF R3375k C47 12pF 50V S1 BUTTON 1 1 2 2 D3 RED 12 R7 470R C37 10uF S3 POS 2 SW 1 1 2 2 3 3 4 4 5 5 6 6 J5 VDD_1V8 1 2 R10 10K
13、 5 5 4 4 3 3 2 2 1 1 DD CC BB AA CC256x HCI Class 1.5 capable Bluetooth device CC256xQFN LEAVE TP TODO: HCI_TX_1V8_CC DCLO CLO ALO SLO UBAL5 BT_RFBT_RF_INRF_ANTANT DIG_LDO_OUT MLDO_OUT VBAT_CC VIO_1V8_CC VBAT VBAT_CC VDD_1V8_LDO VIO_1V8_CC HCI_CTS_1V8_CC P1,2 HCI_RTS_1V8_CC P1,2 HCI_TX_1V8_CC P1,2 H
14、CI_RX_1V8_CC P1,2 AUD_CLK_1V8_CC P1,2 AUD_FSYNC_1V8_CC P1,2 nSHUTDOWN_1V8_CC P1,2 SLOW_CLK_1V8_CC P2 AUD_IN_1V8_CC SizeEDGE NoRev Pageof Title Date BT-MSP-AUDSOURCE Friday, March 07, 201434 B1.16576620SizeEDGE NoRev Pageof Title Date BT-MSP-AUDSOURCE Friday, March 07, 201434 B1.16576620SizeEDGE NoRe
15、v Pageof Title Date BT-MSP-AUDSOURCE Friday, March 07, 201434 B1.16576620 R340R C25 0.47uF 6.3V C28 0.1uF 6.3V R260R J12 VIO_1V8_CC 1 2 G G Y1 26MHz 8pF 1 34 2 EPAD U5 CC2560RVM HCI_TX A33 HCI_RX A26 HCI_RTS A32 HCI_CTS A29 AUD_FSYNC A35 AUD_CLK B32 AUD_IN B34 AUD_OUT B33 SLOW_CLK_IN A25 FREFP B4 FR
16、EFM A4 CLK_REQ_OUT A14 nSHUTD A6 TX_DBG B24 DIG_LDO_OUT_1 A2 DIG_LDO_OUT_2 A3 DIG_LDO_OUT_3 B15 DIG_LDO_OUT_4 B26 DIG_LDO_OUT_5 B27 DIG_LDO_OUT_6 B35 DIG_LDO_OUT_7 B36 DCO_LDO_OUT A12 CL1.5_LDO_OUT A7 ADCPPA_LDO_OUT A8 SRAM_LDO_OUT B1 MLDO_OUT_1 A5 BT_RF B8 VDD_IO_1 A17 CL1.5_LDO_IN B6 MLDO_IN B5 MLDO_OUT_4 B7 MLDO_OUT_3 B2 MLDO_OUT_2 A9 VDD_IO_2 A34 VDD_IO_3 A38 VDD_IO_4 B18 VDD_IO_5 B19 VDD_IO_6 B21 VDD_IO_7 B22 VDD_IO_8 B25 VSS_1 A24 VSS_2 A28 VSS_3 EPAD VSS_DCO B11 VSS_FREF B3 NC_1 A1 NC_2
