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1、.,1,MB主板上電過程,.,2,前言,電腦的開機只需要對著Power鍵輕輕一按即可. 可這一按具體是如何使電腦能開機工作的呢?它的整個過程是怎樣的? 以下分幾個部分做講解,.,3,Content,開機上電動作圖解 主板的電壓定義 主板的主要開機信號介紹 主板開機上電過程(波形和電路),.,4,PWRBTN,Slp-s3(+),Pson#(-),+5v,+3v,+12v/-12v,+5v,+3v,Power ok,NB_ RESET,Reset,SB,NB,CPU,POWER,SUPER I/O OR AS016,Cpu rst,Intel chipset power on sequence,
2、Pwr ok,Power Sequence,.,5,MB Power Sequence,.,6,主板基本電壓 (電源控制IC),主板基本電壓有5個,其他電壓都是由這5個基本電壓轉換而得.,.,7,主板基本電壓,ACPI的Global States 分四個狀態 G0G1G2G3,ACPI表示高級配置和電源管理介面對於Windows2000,ACPI定義了Windows 、BIOS和系統硬體之間的新型工作介面。這些新介面包括Windows 控制電源管理和設備配置的機制。,.,8,主板基本電壓,狀態電壓種類有3種 1.Main power: S0/S1 2.Dual power:S0/S1/S3 3
3、.Standby power:S0/S1/S3/S4/S5,詳細參考附件:,.,9,Main Power,Main power的產生由SLP_S3#去控制。 按Power Button PWRBTN#拉low 通知SIOSIO告知NB NB送出SLP_S3#(此時SLP_S3#為高電平) PSON# 被拉low Power Supply產生Main Power.,.,10,Power-up (Main Power),CH1:+12V Ch2:+5V Ch3:+3V,Main power (+12V,+5V,+3V) almost ramp up at the same time. The ma
4、in power ramp behavior depends on the power supply design.,.,11,Standby Power,1, 在MB上,power supply只提供+5VSB一種standby電壓, 其他standby power都由它轉出來的。 2,Standby power上電(插上power cord)主板就會有,但其提供的電流有限。,.,12,Dual Power,Dual power由standby power和main power提供,他存在於S0,S1,S3這幾種狀態下,由Gate信號去控制哪一個power輸出。,.,13,主板信號簡介,RT
5、CRST# RSMRST# PWRBTN# SLP_S3# PS_ON# PWROK PLTRST#,.,14,RTCRST#,Battery,3.0V,BATT,2.6V,G3 State,BATT comes from BATTERY at G3 state. So BATT will be 2.6V at G3 state. BATT comes from +3VSB at S5 state. So BATT will be 2.9V at S5 state.,S5 State,2.9V,RTCRST#有效:在G3狀態時,拔掉battery,此時SB收到低電平,會清掉COMS 內容;若要
6、給主板維持時間或CMOS內容, RTCRST信號需要是高電平.,.,15,+3VSB,S5 State,+5VSB,RSMRST,After plugging power cord, +5VSB ramps up. +3VSB is regulated from +5VSB. 32ms after +3VSB ramps above VTRIP (2.2V), RSMRST asserts. RSMRST will re-assert after AC power loss, which acts like a wake up event of SB and causes the de-ass
7、ertion of SLP_S3# to turn on the system.,RSMRST#,Resume reset active表示所有的standby power都OK.,RSMRST#: Resume Well Reset, this signal is used for resetting the resume power plane logic.,.,16,AUXOK Logic Example:,Let VPQ3.1 ramps up slower than +3VSB. It is to meet the spec that RSMRST(AUXOK) needs to r
8、amp up after VTR is ready with a delay (20ms for SB600). To precisely estimate the resulting delay from +3VSB to AUXOK, we need to implement the RC charge formula.,VC,If VCC=3.3V, assuming 20ms is needed: t=RC=20ms VC(20ms)=2.08V VC(18.63ms)=2V If VCC=5V, assuming 20ms is needed: 2. t=RC=20ms VC(20m
9、s)=3.16V VC(10.22ms)=2V RC is chosen by substituting VC(t), VCC, t and solve for RC.,RSMRST#,.,17,PWRBTN#,PWRBTN#: Power Button, #:代表低電平有效,.,18,PWRBTN#,Pin6 and pin8 is connected to the power button on the chassis. Pressing power button generate a low pulse to SB and SIO. Power button can be program
10、med to generate suspend, hibernate or shut-down event. Generally PWRBTN# of SB is internal pulled high, R1336 is reserved to avoid internal pull-high malfunction. This must be pulled to standby power.,5. CB918 must be installed: 1. Debounce, 2. Prevent ESD from directly going into SB and SIO. 1000PF
11、 is a commonly used value. 6. To achieve better ESD resist performance, CB918 should be placed near front panel header.,.,19,SLP_S3#,SLP_S3#: Sleep Control,SLP_S3# is for power plane control. This signal shuts off power to all non-critical systems when in S3(Suspend to RAM),S4(Suspend to Disk), or S
12、5 states.,.,20,SLP_S3#,PWRBTN#,SLP_S5#,SLP_S3#,PS_ON#,S0 State,Press Power Button,In Intel platform, SLP_S3# is always used to turn on the power supply. When resuming from S3/S4, any wake up event will cause the de-assertion of SLP_S3#SLP_S5#, and the rest of the power-up power sequence is the same
13、with those resuming from S5. Some SIO, ex:SMSC5127, uses inverted SLP_S3# to generate nPS_ON#. In SIS platform, PS_ON# is generated from SB itself (ex:SIS 968).,+12V,+5V,+3V,ATX POWER,SLP_S4#,.,21,PSON#,PSON# 是低有效信號,當此信號為Low時,Power Supply送出+3.3V,+5V,-5V,+12V,-12V等電壓. 而當此信號被拉High時,Power Supply停止送出上面的
14、電壓. 利用此信號可以設計“ Soft Power down” 的關機功能. 當使用者對作業系統下關機命令時. 作業系統亦可關閉所有的應用程式並利用此腳的功能達到自動關機的動作.,灰色: +5V Power OK signal 綠色: +5V (PS_ON#,電源工作電壓),.,22,PSON#,在主板上,未開機時(S5時), 此信號PSON#一直被pull up到+5VSB. 當User按下Power Button後,一般由Super I/O將此信號拉low,從而通知Power Supply送電. 當實驗時,可以直接把Power supply的PSON#用導線與GND瞬間導通,則此時Powe
15、r Supply開始工作.,.,23,PWROK,PWROK有的資料也叫PWRGD, 是電源準備OK的信號.Power Supply 中會有PWROK,更多的在主板上,且分很多種, 如CPU_PWRGD, NB_PWRGD, VRMPWRGD, VTT_PWRGD. 當電源送出的+3.3V and +5V達到Normal值的95%時,由Power Supply送出此信號.當+3.3V or +5V 掉到Normal的95%以下時,Power Supply就會把此信號拉Low.當主板收到此信號時,表明電源已經準備ok,可以開始動作. 但是大部分情況下,我們不會使用此信號來通知主板動作 (主板上此
16、PIN一般空接) .而是使用專門的ASIC來偵測+3.3V and +5V電壓,當電源發出的電壓符合要求時,由ASIC發出PWROK信號通知主板動作.,PS. ASIC:Application Specific Integrated Circuit,是专用集成电路.目前,在集成 电路界ASIC被认为是一种为专门目的而设计的集成电路,.,24,PWROK,The PWRGD_3V is a function of PWRGD_PS, nSLP_S3. The 1-0 transition of nSLP_S3 will cause an immediate 1-0 transition of PWRGD_3V. The 0-1 transition of PWRGD_PS will cause a 0-1 transition of PWRGD_3V. The PWRGD_3V is either immediate of aft